SecurityPkg: Tpm2DeviceLibDTpm: Introduce StandaloneMm instance

[mirror_edk2.git] / SecurityPkg / Library / Tpm2DeviceLibDTpm / Tpm2Ptp.c

diff --git a/SecurityPkg/Library/Tpm2DeviceLibDTpm/Tpm2Ptp.c b/SecurityPkg/Library/Tpm2DeviceLibDTpm/Tpm2Ptp.c
index 2c73385b6ce518ea1b46ae035c3f13e69c1e3ab8..f1f80916834f10a2061014075be517100abd44d7 100644 (file)
--- a/SecurityPkg/Library/Tpm2DeviceLibDTpm/Tpm2Ptp.c
+++ b/SecurityPkg/Library/Tpm2DeviceLibDTpm/Tpm2Ptp.c
@@ -2,6 +2,7 @@
   PTP (Platform TPM Profile) CRB (Command Response Buffer) interface used by dTPM2.0 library.\r
 \r
 Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c), Microsoft Corporation.\r
 SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
@@ -19,6 +20,8 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include <IndustryStandard/TpmPtp.h>\r
 #include <IndustryStandard/TpmTis.h>\r
 \r
+#include "Tpm2DeviceLibDTpm.h"\r
+\r
 //\r
 // Execution of the command may take from several seconds to minutes for certain\r
 // commands, such as key generation.\r
@@ -174,7 +177,7 @@ PtpCrbTpmCommand (
   // STEP 0:\r
   // if CapCRbIdelByPass == 0, enforce Idle state before sending command\r
   //\r
-  if (PcdGet8(PcdCRBIdleByPass) == 0 && (MmioRead32((UINTN)&CrbReg->CrbControlStatus) & PTP_CRB_CONTROL_AREA_STATUS_TPM_IDLE) == 0){\r
+  if (GetCachedIdleByPass () == 0 && (MmioRead32((UINTN)&CrbReg->CrbControlStatus) & PTP_CRB_CONTROL_AREA_STATUS_TPM_IDLE) == 0){\r
     Status = PtpCrbWaitRegisterBits (\r
               &CrbReg->CrbControlStatus,\r
               PTP_CRB_CONTROL_AREA_STATUS_TPM_IDLE,\r
@@ -330,7 +333,7 @@ GoReady_Exit:
   // Goto Ready State if command is completed successfully and TPM support IdleBypass\r
   // If not supported. flow down to GoIdle\r
   //\r
-  if (PcdGet8(PcdCRBIdleByPass) == 1) {\r
+  if (GetCachedIdleByPass () == 1) {\r
     MmioWrite32((UINTN)&CrbReg->CrbControlRequest, PTP_CRB_CONTROL_AREA_REQUEST_COMMAND_READY);\r
     return Status;\r
   }\r
@@ -350,7 +353,7 @@ GoIdle_Exit:
   // Only enforce Idle state transition if execution fails when CRBIdleBypass==1\r
   // Leave regular Idle delay at the beginning of next command execution\r
   //\r
-  if (PcdGet8(PcdCRBIdleByPass) == 1){\r
+  if (GetCachedIdleByPass () == 1){\r
     Status = PtpCrbWaitRegisterBits (\r
                &CrbReg->CrbControlStatus,\r
                PTP_CRB_CONTROL_AREA_STATUS_TPM_IDLE,\r
@@ -519,7 +522,7 @@ DumpPtpInfo (
   Vid = 0xFFFF;\r
   Did = 0xFFFF;\r
   Rid = 0xFF;\r
-  PtpInterface = PcdGet8(PcdActiveTpmInterfaceType);\r
+  PtpInterface = GetCachedPtpInterface ();\r
   DEBUG ((EFI_D_INFO, "PtpInterface - %x\n", PtpInterface));\r
   switch (PtpInterface) {\r
   case Tpm2PtpInterfaceCrb:\r
@@ -564,7 +567,7 @@ DTpm2SubmitCommand (
 {\r
   TPM2_PTP_INTERFACE_TYPE  PtpInterface;\r
 \r
-  PtpInterface = PcdGet8(PcdActiveTpmInterfaceType);\r
+  PtpInterface = GetCachedPtpInterface ();\r
   switch (PtpInterface) {\r
   case Tpm2PtpInterfaceCrb:\r
     return PtpCrbTpmCommand (\r
@@ -603,7 +606,7 @@ DTpm2RequestUseTpm (
 {\r
   TPM2_PTP_INTERFACE_TYPE  PtpInterface;\r
 \r
-  PtpInterface = PcdGet8(PcdActiveTpmInterfaceType);\r
+  PtpInterface = GetCachedPtpInterface ();\r
   switch (PtpInterface) {\r
   case Tpm2PtpInterfaceCrb:\r
     return PtpCrbRequestUseTpm ((PTP_CRB_REGISTERS_PTR) (UINTN) PcdGet64 (PcdTpmBaseAddress));\r