HII Config Access protocol implementation of TCG2 configuration module.\r
NOTE: This module is only for reference only, each platform should have its own setup page.\r
\r
-Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials \r
are licensed and made available under the terms and conditions of the BSD License \r
which accompanies this distribution. The full text of the license may be found at \r
#include "Tcg2ConfigImpl.h"\r
#include <Library/PcdLib.h>\r
#include <Library/Tpm2CommandLib.h>\r
+#include <Library/IoLib.h>\r
#include <Guid/TpmInstance.h>\r
\r
+#include <IndustryStandard/TpmPtp.h>\r
+\r
#define EFI_TCG2_EVENT_LOG_FORMAT_ALL (EFI_TCG2_EVENT_LOG_FORMAT_TCG_1_2 | EFI_TCG2_EVENT_LOG_FORMAT_TCG_2)\r
\r
TPM_INSTANCE_ID mTpmInstanceId[TPM_DEVICE_MAX + 1] = TPM_INSTANCE_ID_LIST;\r
\r
UINT8 mCurrentPpRequest;\r
\r
+/**\r
+ Return PTP interface type.\r
+\r
+ @param[in] Register Pointer to PTP register.\r
+\r
+ @return PTP interface type.\r
+**/\r
+UINT8\r
+GetPtpInterface (\r
+ IN VOID *Register\r
+ )\r
+{\r
+ PTP_CRB_INTERFACE_IDENTIFIER InterfaceId;\r
+ PTP_FIFO_INTERFACE_CAPABILITY InterfaceCapability;\r
+\r
+ //\r
+ // Check interface id\r
+ //\r
+ InterfaceId.Uint32 = MmioRead32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId);\r
+ InterfaceCapability.Uint32 = MmioRead32 ((UINTN)&((PTP_FIFO_REGISTERS *)Register)->InterfaceCapability);\r
+\r
+ if ((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_CRB) &&\r
+ (InterfaceId.Bits.InterfaceVersion == PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_CRB) &&\r
+ (InterfaceId.Bits.CapCRB != 0)) {\r
+ return TPM_DEVICE_INTERFACE_PTP_CRB;\r
+ }\r
+ if ((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_FIFO) &&\r
+ (InterfaceId.Bits.InterfaceVersion == PTP_INTERFACE_IDENTIFIER_INTERFACE_VERSION_FIFO) &&\r
+ (InterfaceId.Bits.CapFIFO != 0) &&\r
+ (InterfaceCapability.Bits.InterfaceVersion == INTERFACE_CAPABILITY_INTERFACE_VERSION_PTP)) {\r
+ return TPM_DEVICE_INTERFACE_PTP_FIFO;\r
+ }\r
+ return TPM_DEVICE_INTERFACE_TIS;\r
+}\r
+\r
+/**\r
+ Return if PTP CRB is supported.\r
+\r
+ @param[in] Register Pointer to PTP register.\r
+ \r
+ @retval TRUE PTP CRB is supported.\r
+ @retval FALSE PTP CRB is unsupported.\r
+**/\r
+BOOLEAN\r
+IsPtpCrbSupported (\r
+ IN VOID *Register\r
+ )\r
+{\r
+ PTP_CRB_INTERFACE_IDENTIFIER InterfaceId;\r
+\r
+ //\r
+ // Check interface id\r
+ //\r
+ InterfaceId.Uint32 = MmioRead32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId);\r
+\r
+ if (((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_CRB) ||\r
+ (InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_FIFO)) &&\r
+ (InterfaceId.Bits.CapCRB != 0)) {\r
+ return TRUE;\r
+ }\r
+ return FALSE;\r
+}\r
+\r
+/**\r
+ Return if PTP FIFO is supported.\r
+\r
+ @param[in] Register Pointer to PTP register.\r
+ \r
+ @retval TRUE PTP FIFO is supported.\r
+ @retval FALSE PTP FIFO is unsupported.\r
+**/\r
+BOOLEAN\r
+IsPtpFifoSupported (\r
+ IN VOID *Register\r
+ )\r
+{\r
+ PTP_CRB_INTERFACE_IDENTIFIER InterfaceId;\r
+\r
+ //\r
+ // Check interface id\r
+ //\r
+ InterfaceId.Uint32 = MmioRead32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId);\r
+\r
+ if (((InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_CRB) ||\r
+ (InterfaceId.Bits.InterfaceType == PTP_INTERFACE_IDENTIFIER_INTERFACE_TYPE_FIFO)) &&\r
+ (InterfaceId.Bits.CapFIFO != 0)) {\r
+ return TRUE;\r
+ }\r
+ return FALSE;\r
+}\r
+\r
+/**\r
+ Set PTP interface type.\r
+\r
+ @param[in] Register Pointer to PTP register.\r
+ @param[in] PtpInterface PTP interface type.\r
+ \r
+ @retval EFI_SUCCESS PTP interface type is set.\r
+ @retval EFI_INVALID_PARAMETER PTP interface type is invalid.\r
+ @retval EFI_UNSUPPORTED PTP interface type is unsupported.\r
+ @retval EFI_WRITE_PROTECTED PTP interface is locked.\r
+**/\r
+EFI_STATUS\r
+SetPtpInterface (\r
+ IN VOID *Register,\r
+ IN UINT8 PtpInterface\r
+ )\r
+{\r
+ UINT8 PtpInterfaceCurrent;\r
+ PTP_CRB_INTERFACE_IDENTIFIER InterfaceId;\r
+\r
+ PtpInterfaceCurrent = GetPtpInterface (Register);\r
+ if ((PtpInterfaceCurrent != TPM_DEVICE_INTERFACE_PTP_FIFO) && \r
+ (PtpInterfaceCurrent != TPM_DEVICE_INTERFACE_PTP_CRB)) {\r
+ return EFI_UNSUPPORTED;\r
+ }\r
+ InterfaceId.Uint32 = MmioRead32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId);\r
+ if (InterfaceId.Bits.IntfSelLock != 0) {\r
+ return EFI_WRITE_PROTECTED;\r
+ }\r
+\r
+ switch (PtpInterface) {\r
+ case TPM_DEVICE_INTERFACE_PTP_FIFO:\r
+ if (InterfaceId.Bits.CapFIFO == 0) {\r
+ return EFI_UNSUPPORTED;\r
+ }\r
+ InterfaceId.Bits.InterfaceSelector = PTP_INTERFACE_IDENTIFIER_INTERFACE_SELECTOR_FIFO;\r
+ MmioWrite32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId, InterfaceId.Uint32);\r
+ return EFI_SUCCESS;\r
+ case TPM_DEVICE_INTERFACE_PTP_CRB:\r
+ if (InterfaceId.Bits.CapCRB == 0) {\r
+ return EFI_UNSUPPORTED;\r
+ }\r
+ InterfaceId.Bits.InterfaceSelector = PTP_INTERFACE_IDENTIFIER_INTERFACE_SELECTOR_CRB;\r
+ MmioWrite32 ((UINTN)&((PTP_CRB_REGISTERS *)Register)->InterfaceId, InterfaceId.Uint32);\r
+ return EFI_SUCCESS;\r
+ default:\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
+}\r
+\r
/**\r
This function allows a caller to extract the current configuration for one\r
or more named elements from the target driver.\r
OUT EFI_BROWSER_ACTION_REQUEST *ActionRequest\r
)\r
{\r
+ EFI_INPUT_KEY Key;\r
+\r
if ((This == NULL) || (Value == NULL) || (ActionRequest == NULL)) {\r
return EFI_INVALID_PARAMETER;\r
}\r
+\r
+ if (Action == EFI_BROWSER_ACTION_CHANGING) {\r
+ if (QuestionId == KEY_TPM_DEVICE_INTERFACE) {\r
+ EFI_STATUS Status;\r
+ Status = SetPtpInterface ((VOID *) (UINTN) PcdGet64 (PcdTpmBaseAddress), Value->u8);\r
+ if (EFI_ERROR (Status)) {\r
+ CreatePopUp (\r
+ EFI_LIGHTGRAY | EFI_BACKGROUND_BLUE,\r
+ &Key,\r
+ L"Error: Fail to set PTP interface!",\r
+ NULL\r
+ );\r
+ return EFI_DEVICE_ERROR;\r
+ }\r
+ }\r
+ }\r
\r
if (Action == EFI_BROWSER_ACTION_CHANGED) {\r
if (QuestionId == KEY_TPM_DEVICE) {\r
TPML_PCR_SELECTION Pcrs;\r
CHAR16 TempBuffer[1024];\r
TCG2_CONFIGURATION_INFO Tcg2ConfigInfo;\r
+ UINT8 TpmDeviceInterfaceDetected;\r
\r
DriverHandle = NULL;\r
ConfigAccess = &PrivateData->ConfigAccess;\r
HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_STATE_CONTENT), L"TPM 1.2", NULL);\r
break;\r
case TPM_DEVICE_2_0_DTPM:\r
- HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_STATE_CONTENT), L"TPM 2.0 (DTPM)", NULL);\r
+ HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_STATE_CONTENT), L"TPM 2.0", NULL);\r
break;\r
default:\r
HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_STATE_CONTENT), L"Unknown", NULL);\r
FillBufferWithBootHashAlg (TempBuffer, sizeof(TempBuffer), PrivateData->ProtocolCapability.ActivePcrBanks);\r
HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_ACTIVE_PCR_BANKS_CONTENT), TempBuffer, NULL);\r
\r
+ //\r
+ // Update TPM device interface type\r
+ //\r
+ if (PrivateData->TpmDeviceDetected == TPM_DEVICE_2_0_DTPM) {\r
+ TpmDeviceInterfaceDetected = GetPtpInterface ((VOID *) (UINTN) PcdGet64 (PcdTpmBaseAddress));\r
+ switch (TpmDeviceInterfaceDetected) {\r
+ case TPM_DEVICE_INTERFACE_TIS:\r
+ HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_INTERFACE_STATE_CONTENT), L"TIS", NULL);\r
+ break;\r
+ case TPM_DEVICE_INTERFACE_PTP_FIFO:\r
+ HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_INTERFACE_STATE_CONTENT), L"PTP FIFO", NULL);\r
+ break;\r
+ case TPM_DEVICE_INTERFACE_PTP_CRB:\r
+ HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_INTERFACE_STATE_CONTENT), L"PTP CRB", NULL);\r
+ break;\r
+ default:\r
+ HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_INTERFACE_STATE_CONTENT), L"Unknown", NULL);\r
+ break;\r
+ }\r
+\r
+ Tcg2ConfigInfo.TpmDeviceInterfaceAttempt = TpmDeviceInterfaceDetected;\r
+ switch (TpmDeviceInterfaceDetected) {\r
+ case TPM_DEVICE_INTERFACE_TIS:\r
+ Tcg2ConfigInfo.TpmDeviceInterfacePtpFifoSupported = FALSE;\r
+ Tcg2ConfigInfo.TpmDeviceInterfacePtpCrbSupported = FALSE;\r
+ HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_INTERFACE_CAPABILITY_CONTENT), L"TIS", NULL);\r
+ break;\r
+ case TPM_DEVICE_INTERFACE_PTP_FIFO:\r
+ case TPM_DEVICE_INTERFACE_PTP_CRB:\r
+ Tcg2ConfigInfo.TpmDeviceInterfacePtpFifoSupported = IsPtpFifoSupported((VOID *) (UINTN) PcdGet64 (PcdTpmBaseAddress));\r
+ Tcg2ConfigInfo.TpmDeviceInterfacePtpCrbSupported = IsPtpCrbSupported((VOID *) (UINTN) PcdGet64 (PcdTpmBaseAddress));\r
+ TempBuffer[0] = 0;\r
+ if (Tcg2ConfigInfo.TpmDeviceInterfacePtpFifoSupported) {\r
+ if (TempBuffer[0] != 0) {\r
+ StrCatS (TempBuffer, sizeof(TempBuffer) / sizeof (CHAR16), L", ");\r
+ }\r
+ StrCatS (TempBuffer, sizeof(TempBuffer) / sizeof (CHAR16), L"PTP FIFO");\r
+ }\r
+ if (Tcg2ConfigInfo.TpmDeviceInterfacePtpCrbSupported) {\r
+ if (TempBuffer[0] != 0) {\r
+ StrCatS (TempBuffer, sizeof(TempBuffer) / sizeof (CHAR16), L", ");\r
+ }\r
+ StrCatS (TempBuffer, sizeof(TempBuffer) / sizeof (CHAR16), L"PTP CRB");\r
+ }\r
+ HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_INTERFACE_CAPABILITY_CONTENT), TempBuffer, NULL);\r
+ break;\r
+ default:\r
+ Tcg2ConfigInfo.TpmDeviceInterfacePtpFifoSupported = FALSE;\r
+ Tcg2ConfigInfo.TpmDeviceInterfacePtpCrbSupported = FALSE;\r
+ HiiSetString (PrivateData->HiiHandle, STRING_TOKEN (STR_TCG2_DEVICE_INTERFACE_CAPABILITY_CONTENT), L"Unknown", NULL);\r
+ break;\r
+ }\r
+ }\r
+\r
//\r
// Set ConfigInfo, to control the check box.\r
//\r
projects / mirror_edk2.git / blobdiff