//\r
// Do not configure Interrupt if IRQ Num is configured 0 by default\r
//\r
- If (LEqual(IRQN, 0)) {\r
- Return (0)\r
- }\r
-\r
- //\r
- // Update resource descriptor\r
- // Use the field name to identify the offsets in the argument\r
- // buffer and RES0 buffer.\r
- //\r
- CreateDWordField(Arg0, ^INTR._INT, IRQ0)\r
- CreateDWordField(RES0, ^INTR._INT, LIRQ)\r
- Store(IRQ0, LIRQ)\r
- Store(IRQ0, IRQN)\r
+ If (LNotEqual(IRQN, 0)) {\r
+ //\r
+ // Update resource descriptor\r
+ // Use the field name to identify the offsets in the argument\r
+ // buffer and RES0 buffer.\r
+ //\r
+ CreateDWordField(Arg0, ^INTR._INT, IRQ0)\r
+ CreateDWordField(RES0, ^INTR._INT, LIRQ)\r
+ Store(IRQ0, LIRQ)\r
+ Store(IRQ0, IRQN)\r
\r
- CreateBitField(Arg0, ^INTR._HE, ITRG)\r
- CreateBitField(RES0, ^INTR._HE, LTRG)\r
- Store(ITRG, LTRG)\r
+ CreateBitField(Arg0, ^INTR._HE, ITRG)\r
+ CreateBitField(RES0, ^INTR._HE, LTRG)\r
+ Store(ITRG, LTRG)\r
\r
- CreateBitField(Arg0, ^INTR._LL, ILVL)\r
- CreateBitField(RES0, ^INTR._LL, LLVL)\r
- Store(ILVL, LLVL)\r
+ CreateBitField(Arg0, ^INTR._LL, ILVL)\r
+ CreateBitField(RES0, ^INTR._LL, LLVL)\r
+ Store(ILVL, LLVL)\r
\r
- //\r
- // Update TPM FIFO PTP/TIS interface only, identified by TPM_INTERFACE_ID_x lowest\r
- // nibble.\r
- // 0000 - FIFO interface as defined in PTP for TPM 2.0 is active\r
- // 1111 - FIFO interface as defined in TIS1.3 is active\r
- //\r
- If (LOr(LEqual (And (TID0, 0x0F), 0x00), LEqual (And (TID0, 0x0F), 0x0F))) {\r
//\r
- // If FIFO interface, interrupt vector register is\r
- // available. TCG PTP specification allows only\r
- // values 1..15 in this field. For other interrupts\r
- // the field should stay 0.\r
+ // Update TPM FIFO PTP/TIS interface only, identified by TPM_INTERFACE_ID_x lowest\r
+ // nibble.\r
+ // 0000 - FIFO interface as defined in PTP for TPM 2.0 is active\r
+ // 1111 - FIFO interface as defined in TIS1.3 is active\r
//\r
- If (LLess (IRQ0, 16)) {\r
- Store (And(IRQ0, 0xF), INTV)\r
- }\r
- //\r
- // Interrupt enable register (TPM_INT_ENABLE_x) bits 3:4\r
- // contains settings for interrupt polarity.\r
- // The other bits of the byte enable individual interrupts.\r
- // They should be all be zero, but to avoid changing the\r
- // configuration, the other bits are be preserved.\r
- // 00 - high level\r
- // 01 - low level\r
- // 10 - rising edge\r
- // 11 - falling edge\r
- //\r
- // ACPI spec definitions:\r
- // _HE: '1' is Edge, '0' is Level\r
- // _LL: '1' is ActiveHigh, '0' is ActiveLow (inverted from TCG spec)\r
- //\r
- If (LEqual (ITRG, 1)) {\r
- Or(INTE, 0x00000010, INTE)\r
- } Else {\r
- And(INTE, 0xFFFFFFEF, INTE)\r
- }\r
- if (LEqual (ILVL, 0)) {\r
- Or(INTE, 0x00000008, INTE)\r
- } Else {\r
- And(INTE, 0xFFFFFFF7, INTE)\r
+ If (LOr(LEqual (And (TID0, 0x0F), 0x00), LEqual (And (TID0, 0x0F), 0x0F))) {\r
+ //\r
+ // If FIFO interface, interrupt vector register is\r
+ // available. TCG PTP specification allows only\r
+ // values 1..15 in this field. For other interrupts\r
+ // the field should stay 0.\r
+ //\r
+ If (LLess (IRQ0, 16)) {\r
+ Store (And(IRQ0, 0xF), INTV)\r
+ }\r
+ //\r
+ // Interrupt enable register (TPM_INT_ENABLE_x) bits 3:4\r
+ // contains settings for interrupt polarity.\r
+ // The other bits of the byte enable individual interrupts.\r
+ // They should be all be zero, but to avoid changing the\r
+ // configuration, the other bits are be preserved.\r
+ // 00 - high level\r
+ // 01 - low level\r
+ // 10 - rising edge\r
+ // 11 - falling edge\r
+ //\r
+ // ACPI spec definitions:\r
+ // _HE: '1' is Edge, '0' is Level\r
+ // _LL: '1' is ActiveHigh, '0' is ActiveLow (inverted from TCG spec)\r
+ //\r
+ If (LEqual (ITRG, 1)) {\r
+ Or(INTE, 0x00000010, INTE)\r
+ } Else {\r
+ And(INTE, 0xFFFFFFEF, INTE)\r
+ }\r
+ if (LEqual (ILVL, 0)) {\r
+ Or(INTE, 0x00000008, INTE)\r
+ } Else {\r
+ And(INTE, 0xFFFFFFF7, INTE)\r
+ }\r
}\r
}\r
}\r
//\r
// TCG Hardware Information\r
//\r
- Method (HINF, 3, Serialized, 0, {BuffObj, PkgObj}, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj\r
+ Method (HINF, 1, Serialized, 0, {BuffObj, PkgObj}, {UnknownObj}) // IntObj\r
{\r
//\r
// Switch by function index\r
//\r
- Switch (ToInteger(Arg1))\r
+ Switch (ToInteger(Arg0))\r
{\r
Case (0)\r
{\r
//\r
// TCG Physical Presence Interface\r
//\r
- Method (TPPI, 3, Serialized, 0, {BuffObj, PkgObj, IntObj, StrObj}, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj\r
+ Method (TPPI, 2, Serialized, 0, {BuffObj, PkgObj, IntObj, StrObj}, {UnknownObj, UnknownObj}) // IntObj, PkgObj\r
{\r
//\r
// Switch by function index\r
//\r
- Switch (ToInteger(Arg1))\r
+ Switch (ToInteger(Arg0))\r
{\r
Case (0)\r
{\r
// b) Submit TPM Operation Request to Pre-OS Environment\r
//\r
\r
- Store (DerefOf (Index (Arg2, 0x00)), PPRQ)\r
+ Store (DerefOf (Index (Arg1, 0x00)), PPRQ)\r
Store (0, PPRM)\r
Store (0x02, PPIP)\r
\r
// g) Submit TPM Operation Request to Pre-OS Environment 2\r
//\r
Store (7, PPIP)\r
- Store (DerefOf (Index (Arg2, 0x00)), PPRQ)\r
+ Store (DerefOf (Index (Arg1, 0x00)), PPRQ)\r
Store (0, PPRM)\r
If (LEqual (PPRQ, 23)) {\r
- Store (DerefOf (Index (Arg2, 0x01)), PPRM)\r
+ Store (DerefOf (Index (Arg1, 0x01)), PPRM)\r
}\r
\r
//\r
// e) Get User Confirmation Status for Operation\r
//\r
Store (8, PPIP)\r
- Store (DerefOf (Index (Arg2, 0x00)), UCRQ)\r
+ Store (DerefOf (Index (Arg1, 0x00)), UCRQ)\r
\r
//\r
// Trigger the SMI interrupt\r
Return (1)\r
}\r
\r
- Method (TMCI, 3, Serialized, 0, IntObj, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj\r
+ Method (TMCI, 2, Serialized, 0, IntObj, {UnknownObj, UnknownObj}) // IntObj, PkgObj\r
{\r
//\r
// Switch by function index\r
//\r
- Switch (ToInteger (Arg1))\r
+ Switch (ToInteger (Arg0))\r
{\r
Case (0)\r
{\r
//\r
// Save the Operation Value of the Request to MORD (reserved memory)\r
//\r
- Store (DerefOf (Index (Arg2, 0x00)), MORD)\r
+ Store (DerefOf (Index (Arg1, 0x00)), MORD)\r
\r
//\r
// Trigger the SMI through ACPI _DSM method.\r
//\r
If(LEqual(Arg0, ToUUID ("cf8e16a5-c1e8-4e25-b712-4f54a96702c8")))\r
{\r
- Return (HINF (Arg1, Arg2, Arg3))\r
+ Return (HINF (Arg2))\r
}\r
\r
//\r
//\r
If(LEqual(Arg0, ToUUID ("3dddfaa6-361b-4eb4-a424-8d10089d1653")))\r
{\r
- Return (TPPI (Arg1, Arg2, Arg3))\r
+ Return (TPPI (Arg2, Arg3))\r
}\r
\r
//\r
//\r
If(LEqual(Arg0, ToUUID ("376054ed-cc13-4675-901c-4756d7f2d45d")))\r
{\r
- Return (TMCI (Arg1, Arg2, Arg3))\r
+ Return (TMCI (Arg2, Arg3))\r
}\r
\r
Return (Buffer () {0})\r