SecurityPkg:Tcg: Fix comment typos

[mirror_edk2.git] / SecurityPkg / Tcg / TcgSmm / Tpm.asl

diff --git a/SecurityPkg/Tcg/TcgSmm/Tpm.asl b/SecurityPkg/Tcg/TcgSmm/Tpm.asl
index 47a68ca61a2f6867fec51441bb874f5873878564..2114283b45105364032bf4d72078cb6d40af3c26 100644 (file)
--- a/SecurityPkg/Tcg/TcgSmm/Tpm.asl
+++ b/SecurityPkg/Tcg/TcgSmm/Tpm.asl
@@ -1,14 +1,14 @@
 /** @file\r
-  The TPM definition block in ACPI table for physical presence  \r
+  The TPM definition block in ACPI table for physical presence\r
   and MemoryClear.\r
 \r
-Copyright (c) 2011, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials \r
-are licensed and made available under the terms and conditions of the BSD License \r
-which accompanies this distribution.  The full text of the license may be found at \r
+Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution.  The full text of the license may be found at\r
 http://opensource.org/licenses/bsd-license.php\r
 \r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
 \r
 **/\r
@@ -16,8 +16,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 DefinitionBlock (\r
   "Tpm.aml",\r
   "SSDT",\r
-  1,\r
-  "Intel_",\r
+  2,\r
+  "INTEL ",\r
   "TcgTable",\r
   0x1000\r
   )\r
@@ -41,7 +41,7 @@ DefinitionBlock (
       // Return the resource consumed by TPM device\r
       //\r
       Name (_CRS, ResourceTemplate () {\r
-        Memory32Fixed (ReadOnly, 0xfed40000, 0x5000)\r
+        Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)\r
       })\r
 \r
       //\r
@@ -49,7 +49,7 @@ DefinitionBlock (
       //\r
       OperationRegion (SMIP, SystemIO, 0xB2, 1)\r
       Field (SMIP, ByteAcc, NoLock, Preserve)\r
-      { \r
+      {\r
           IOB2, 8\r
       }\r
 \r
@@ -64,9 +64,9 @@ DefinitionBlock (
 \r
       //\r
       // Operational region for TPM support, TPM Physical Presence and TPM Memory Clear\r
-      // Region Offset to be fixed at runtime\r
+      // Region Offset 0xFFFF0000 and Length 0xF0 will be fixed in C code.\r
       //\r
-      OperationRegion (TNVS, SystemMemory, 0xFFFF0000, 0x1E)\r
+      OperationRegion (TNVS, SystemMemory, 0xFFFF0000, 0xF0)\r
       Field (TNVS, AnyAcc, NoLock, Preserve)\r
       {\r
         PPIN,   8,  //   Software SMI for Physical Presence Interface\r
@@ -77,34 +77,36 @@ DefinitionBlock (
         FRET,   32, //   Physical Presence function return code\r
         MCIN,   8,  //   Software SMI for Memory Clear Interface\r
         MCIP,   32, //   Used for save the Mor paramter\r
-        MORD,   32  //   Memory Overwrite Request Data\r
+        MORD,   32, //   Memory Overwrite Request Data\r
+        MRET,   32, //   Memory Overwrite function return code\r
+        UCRQ,   32  //   Phyical Presence request operation to Get User Confirmation Status\r
       }\r
 \r
       Method (PTS, 1, Serialized)\r
-      {  \r
+      {\r
         //\r
         // Detect Sx state for MOR, only S4, S5 need to handle\r
         //\r
         If (LAnd (LLess (Arg0, 6), LGreater (Arg0, 3)))\r
-        {   \r
+        {\r
           //\r
           // Bit4 -- DisableAutoDetect. 0 -- Firmware MAY autodetect.\r
           //\r
           If (LNot (And (MORD, 0x10)))\r
           {\r
             //\r
-            // Triggle the SMI through ACPI _PTS method.\r
+            // Trigger the SMI through ACPI _PTS method.\r
             //\r
             Store (0x02, MCIP)\r
-              \r
+\r
             //\r
-            // Triggle the SMI interrupt\r
+            // Trigger the SMI interrupt\r
             //\r
             Store (MCIN, IOB2)\r
           }\r
         }\r
         Return (0)\r
-      }   \r
+      }\r
 \r
       Method (_STA, 0)\r
       {\r
@@ -154,12 +156,12 @@ DefinitionBlock (
       }\r
 \r
       Name(TPM2, Package (0x02){\r
-        Zero, \r
+        Zero,\r
         Zero\r
       })\r
 \r
       Name(TPM3, Package (0x03){\r
-        Zero, \r
+        Zero,\r
         Zero,\r
         Zero\r
       })\r
@@ -168,7 +170,7 @@ DefinitionBlock (
       // TCG Physical Presence Interface\r
       //\r
       Method (TPPI, 3, Serialized, 0, {BuffObj, PkgObj, IntObj, StrObj}, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj\r
-      {        \r
+      {\r
         //\r
         // Switch by function index\r
         //\r
@@ -193,12 +195,12 @@ DefinitionBlock (
             //\r
             // b) Submit TPM Operation Request to Pre-OS Environment\r
             //\r
-                  \r
+\r
             Store (DerefOf (Index (Arg2, 0x00)), PPRQ)\r
             Store (0x02, PPIP)\r
-              \r
+\r
             //\r
-            // Triggle the SMI interrupt\r
+            // Trigger the SMI interrupt\r
             //\r
             Store (PPIN, IOB2)\r
             Return (FRET)\r
@@ -210,7 +212,7 @@ DefinitionBlock (
             //\r
             // c) Get Pending TPM Operation Requested By the OS\r
             //\r
-                  \r
+\r
             Store (PPRQ, Index (TPM2, 0x01))\r
             Return (TPM2)\r
           }\r
@@ -227,12 +229,12 @@ DefinitionBlock (
             // e) Return TPM Operation Response to OS Environment\r
             //\r
             Store (0x05, PPIP)\r
-                  \r
+\r
             //\r
-            // Triggle the SMI interrupt\r
+            // Trigger the SMI interrupt\r
             //\r
             Store (PPIN, IOB2)\r
-                  \r
+\r
             Store (LPPR, Index (TPM3, 0x01))\r
             Store (PPRP, Index (TPM3, 0x02))\r
 \r
@@ -255,11 +257,11 @@ DefinitionBlock (
             //\r
             Store (7, PPIP)\r
             Store (DerefOf (Index (Arg2, 0x00)), PPRQ)\r
-                \r
+\r
             //\r
-            // Triggle the SMI interrupt \r
+            // Trigger the SMI interrupt\r
             //\r
-            Store (PPIN, IOB2)  \r
+            Store (PPIN, IOB2)\r
             Return (FRET)\r
           }\r
           Case (8)\r
@@ -268,13 +270,13 @@ DefinitionBlock (
             // e) Get User Confirmation Status for Operation\r
             //\r
             Store (8, PPIP)\r
-            Store (DerefOf (Index (Arg2, 0x00)), PPRQ)\r
-                  \r
+            Store (DerefOf (Index (Arg2, 0x00)), UCRQ)\r
+\r
             //\r
-            // Triggle the SMI interrupt\r
+            // Trigger the SMI interrupt\r
             //\r
             Store (PPIN, IOB2)\r
-                  \r
+\r
             Return (FRET)\r
           }\r
 \r
@@ -303,21 +305,21 @@ DefinitionBlock (
             // Save the Operation Value of the Request to MORD (reserved memory)\r
             //\r
             Store (DerefOf (Index (Arg2, 0x00)), MORD)\r
-                  \r
+\r
             //\r
-            // Triggle the SMI through ACPI _DSM method.\r
+            // Trigger the SMI through ACPI _DSM method.\r
             //\r
             Store (0x01, MCIP)\r
-                  \r
+\r
             //\r
-            // Triggle the SMI interrupt\r
+            // Trigger the SMI interrupt\r
             //\r
             Store (MCIN, IOB2)\r
-            Return (0)\r
+            Return (MRET)\r
           }\r
           Default {BreakPoint}\r
         }\r
-        Return (1)        \r
+        Return (1)\r
       }\r
 \r
       Method (_DSM, 4, Serialized, 0, UnknownObj, {BuffObj, IntObj, IntObj, PkgObj})\r