+/**\r
+ Function to interpret and print out the link control structure\r
+\r
+ @param[in] HeaderAddress The Address of this capability header.\r
+ @param[in] HeadersBaseAddress The address of all the extended capability headers.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PrintInterpretedExtendedCompatibilityLinkControl (\r
+ IN CONST PCI_EXP_EXT_HDR *HeaderAddress,\r
+ IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress\r
+ )\r
+{\r
+ CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_INTERNAL_LINK_CONTROL *Header;\r
+ Header = (PCI_EXPRESS_EXTENDED_CAPABILITIES_INTERNAL_LINK_CONTROL*)HeaderAddress;\r
+\r
+ ShellPrintHiiEx(\r
+ -1, -1, NULL, \r
+ STRING_TOKEN (STR_PCI_EXT_CAP_LINK_CONTROL), \r
+ gShellDebug1HiiHandle, \r
+ Header->RootComplexLinkCapabilities,\r
+ Header->RootComplexLinkControl,\r
+ Header->RootComplexLinkStatus\r
+ ); \r
+ DumpHex (\r
+ 4,\r
+ EFI_PCIE_CAPABILITY_BASE_OFFSET + ((UINT8*)HeaderAddress - (UINT8*)HeadersBaseAddress),\r
+ sizeof(PCI_EXPRESS_EXTENDED_CAPABILITIES_INTERNAL_LINK_CONTROL),\r
+ (VOID *) (HeaderAddress)\r
+ );\r
+ return (EFI_SUCCESS);\r
+}\r
+\r
+/**\r
+ Function to interpret and print out the power budgeting structure\r
+\r
+ @param[in] HeaderAddress The Address of this capability header.\r
+ @param[in] HeadersBaseAddress The address of all the extended capability headers.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PrintInterpretedExtendedCompatibilityPowerBudgeting (\r
+ IN CONST PCI_EXP_EXT_HDR *HeaderAddress,\r
+ IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress\r
+ )\r
+{\r
+ CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_POWER_BUDGETING *Header;\r
+ Header = (PCI_EXPRESS_EXTENDED_CAPABILITIES_POWER_BUDGETING*)HeaderAddress;\r
+\r
+ ShellPrintHiiEx(\r
+ -1, -1, NULL, \r
+ STRING_TOKEN (STR_PCI_EXT_CAP_POWER), \r
+ gShellDebug1HiiHandle, \r
+ Header->DataSelect,\r
+ Header->Data,\r
+ Header->PowerBudgetCapability\r
+ ); \r
+ DumpHex (\r
+ 4,\r
+ EFI_PCIE_CAPABILITY_BASE_OFFSET + ((UINT8*)HeaderAddress - (UINT8*)HeadersBaseAddress),\r
+ sizeof(PCI_EXPRESS_EXTENDED_CAPABILITIES_POWER_BUDGETING),\r
+ (VOID *) (HeaderAddress)\r
+ );\r
+ return (EFI_SUCCESS);\r
+}\r
+\r
+/**\r
+ Function to interpret and print out the ACS structure\r
+\r
+ @param[in] HeaderAddress The Address of this capability header.\r
+ @param[in] HeadersBaseAddress The address of all the extended capability headers.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PrintInterpretedExtendedCompatibilityAcs (\r
+ IN CONST PCI_EXP_EXT_HDR *HeaderAddress,\r
+ IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress\r
+ )\r
+{\r
+ CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_ACS_EXTENDED *Header;\r
+ UINT16 VectorSize;\r
+ UINT16 LoopCounter;\r
+\r
+ Header = (PCI_EXPRESS_EXTENDED_CAPABILITIES_ACS_EXTENDED*)HeaderAddress;\r
+ VectorSize = 0;\r
+\r
+ ShellPrintHiiEx(\r
+ -1, -1, NULL, \r
+ STRING_TOKEN (STR_PCI_EXT_CAP_ACS), \r
+ gShellDebug1HiiHandle, \r
+ Header->AcsCapability,\r
+ Header->AcsControl\r
+ ); \r
+ if (PCI_EXPRESS_EXTENDED_CAPABILITY_ACS_EXTENDED_GET_EGRES_CONTROL(Header)) {\r
+ VectorSize = PCI_EXPRESS_EXTENDED_CAPABILITY_ACS_EXTENDED_GET_EGRES_VECTOR_SIZE(Header);\r
+ if (VectorSize == 0) {\r
+ VectorSize = 256;\r
+ }\r
+ for (LoopCounter = 0 ; LoopCounter * 8 < VectorSize ; LoopCounter++) {\r
+ ShellPrintHiiEx(\r
+ -1, -1, NULL, \r
+ STRING_TOKEN (STR_PCI_EXT_CAP_ACS2), \r
+ gShellDebug1HiiHandle, \r
+ LoopCounter + 1,\r
+ Header->EgressControlVectorArray[LoopCounter]\r
+ ); \r
+ }\r
+ }\r
+ DumpHex (\r
+ 4,\r
+ EFI_PCIE_CAPABILITY_BASE_OFFSET + ((UINT8*)HeaderAddress - (UINT8*)HeadersBaseAddress),\r
+ sizeof(PCI_EXPRESS_EXTENDED_CAPABILITIES_ACS_EXTENDED) + (VectorSize / 8) - 1,\r
+ (VOID *) (HeaderAddress)\r
+ );\r
+ return (EFI_SUCCESS);\r
+}\r
+\r
+/**\r
+ Function to interpret and print out the latency tolerance reporting structure\r
+\r
+ @param[in] HeaderAddress The Address of this capability header.\r
+ @param[in] HeadersBaseAddress The address of all the extended capability headers.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PrintInterpretedExtendedCompatibilityLatencyToleranceReporting (\r
+ IN CONST PCI_EXP_EXT_HDR *HeaderAddress,\r
+ IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress\r
+ )\r
+{\r
+ CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_LATENCE_TOLERANCE_REPORTING *Header;\r
+ Header = (PCI_EXPRESS_EXTENDED_CAPABILITIES_LATENCE_TOLERANCE_REPORTING*)HeaderAddress;\r
+\r
+ ShellPrintHiiEx(\r
+ -1, -1, NULL, \r
+ STRING_TOKEN (STR_PCI_EXT_CAP_LAT), \r
+ gShellDebug1HiiHandle, \r
+ Header->MaxSnoopLatency,\r
+ Header->MaxNoSnoopLatency\r
+ ); \r
+ DumpHex (\r
+ 4,\r
+ EFI_PCIE_CAPABILITY_BASE_OFFSET + ((UINT8*)HeaderAddress - (UINT8*)HeadersBaseAddress),\r
+ sizeof(PCI_EXPRESS_EXTENDED_CAPABILITIES_LATENCE_TOLERANCE_REPORTING),\r
+ (VOID *) (HeaderAddress)\r
+ );\r
+ return (EFI_SUCCESS);\r
+}\r
+\r
+/**\r
+ Function to interpret and print out the serial number structure\r
+\r
+ @param[in] HeaderAddress The Address of this capability header.\r
+ @param[in] HeadersBaseAddress The address of all the extended capability headers.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PrintInterpretedExtendedCompatibilitySerialNumber (\r
+ IN CONST PCI_EXP_EXT_HDR *HeaderAddress,\r
+ IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress\r
+ )\r
+{\r
+ CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_SERIAL_NUMBER *Header;\r
+ Header = (PCI_EXPRESS_EXTENDED_CAPABILITIES_SERIAL_NUMBER*)HeaderAddress;\r
+\r
+ ShellPrintHiiEx(\r
+ -1, -1, NULL, \r
+ STRING_TOKEN (STR_PCI_EXT_CAP_SN), \r
+ gShellDebug1HiiHandle, \r
+ Header->SerialNumber\r
+ ); \r
+ DumpHex (\r
+ 4,\r
+ EFI_PCIE_CAPABILITY_BASE_OFFSET + ((UINT8*)HeaderAddress - (UINT8*)HeadersBaseAddress),\r
+ sizeof(PCI_EXPRESS_EXTENDED_CAPABILITIES_SERIAL_NUMBER),\r
+ (VOID *) (HeaderAddress)\r
+ );\r
+ return (EFI_SUCCESS);\r
+}\r
+\r
+/**\r
+ Function to interpret and print out the RCRB structure\r
+\r
+ @param[in] HeaderAddress The Address of this capability header.\r
+ @param[in] HeadersBaseAddress The address of all the extended capability headers.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PrintInterpretedExtendedCompatibilityRcrb (\r
+ IN CONST PCI_EXP_EXT_HDR *HeaderAddress,\r
+ IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress\r
+ )\r
+{\r
+ CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_RCRB_HEADER *Header;\r
+ Header = (PCI_EXPRESS_EXTENDED_CAPABILITIES_RCRB_HEADER*)HeaderAddress;\r
+\r
+ ShellPrintHiiEx(\r
+ -1, -1, NULL, \r
+ STRING_TOKEN (STR_PCI_EXT_CAP_RCRB), \r
+ gShellDebug1HiiHandle, \r
+ Header->VendorId,\r
+ Header->DeviceId,\r
+ Header->RcrbCapabilities,\r
+ Header->RcrbControl\r
+ ); \r
+ DumpHex (\r
+ 4,\r
+ EFI_PCIE_CAPABILITY_BASE_OFFSET + ((UINT8*)HeaderAddress - (UINT8*)HeadersBaseAddress),\r
+ sizeof(PCI_EXPRESS_EXTENDED_CAPABILITIES_RCRB_HEADER),\r
+ (VOID *) (HeaderAddress)\r
+ );\r
+ return (EFI_SUCCESS);\r
+}\r
+\r
+/**\r
+ Function to interpret and print out the vendor specific structure\r
+\r
+ @param[in] HeaderAddress The Address of this capability header.\r
+ @param[in] HeadersBaseAddress The address of all the extended capability headers.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PrintInterpretedExtendedCompatibilityVendorSpecific (\r
+ IN CONST PCI_EXP_EXT_HDR *HeaderAddress,\r
+ IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress\r
+ )\r
+{\r
+ CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_VENDOR_SPECIFIC *Header;\r
+ Header = (PCI_EXPRESS_EXTENDED_CAPABILITIES_VENDOR_SPECIFIC*)HeaderAddress;\r
+\r
+ ShellPrintHiiEx(\r
+ -1, -1, NULL, \r
+ STRING_TOKEN (STR_PCI_EXT_CAP_VEN), \r
+ gShellDebug1HiiHandle, \r
+ Header->VendorSpecificHeader\r
+ ); \r
+ DumpHex (\r
+ 4,\r
+ EFI_PCIE_CAPABILITY_BASE_OFFSET + ((UINT8*)HeaderAddress - (UINT8*)HeadersBaseAddress),\r
+ PCI_EXPRESS_EXTENDED_CAPABILITY_VENDOR_SPECIFIC_GET_SIZE(Header),\r
+ (VOID *) (HeaderAddress)\r
+ );\r
+ return (EFI_SUCCESS);\r
+}\r
+\r
+/**\r
+ Function to interpret and print out the Event Collector Endpoint Association structure\r
+\r
+ @param[in] HeaderAddress The Address of this capability header.\r
+ @param[in] HeadersBaseAddress The address of all the extended capability headers.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PrintInterpretedExtendedCompatibilityECEA (\r
+ IN CONST PCI_EXP_EXT_HDR *HeaderAddress,\r
+ IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress\r
+ )\r
+{\r
+ CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_EVENT_COLLECTOR_ENDPOINT_ASSOCIATION *Header;\r
+ Header = (PCI_EXPRESS_EXTENDED_CAPABILITIES_EVENT_COLLECTOR_ENDPOINT_ASSOCIATION*)HeaderAddress;\r
+\r
+ ShellPrintHiiEx(\r
+ -1, -1, NULL, \r
+ STRING_TOKEN (STR_PCI_EXT_CAP_ECEA), \r
+ gShellDebug1HiiHandle, \r
+ Header->AssociationBitmap\r
+ ); \r
+ DumpHex (\r
+ 4,\r
+ EFI_PCIE_CAPABILITY_BASE_OFFSET + ((UINT8*)HeaderAddress - (UINT8*)HeadersBaseAddress),\r
+ sizeof(PCI_EXPRESS_EXTENDED_CAPABILITIES_EVENT_COLLECTOR_ENDPOINT_ASSOCIATION),\r
+ (VOID *) (HeaderAddress)\r
+ );\r
+ return (EFI_SUCCESS);\r
+}\r
+\r
+/**\r
+ Function to interpret and print out the ARI structure\r
+\r
+ @param[in] HeaderAddress The Address of this capability header.\r
+ @param[in] HeadersBaseAddress The address of all the extended capability headers.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PrintInterpretedExtendedCompatibilityAri (\r
+ IN CONST PCI_EXP_EXT_HDR *HeaderAddress,\r
+ IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress\r
+ )\r
+{\r
+ CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_ARI_CAPABILITY *Header;\r
+ Header = (PCI_EXPRESS_EXTENDED_CAPABILITIES_ARI_CAPABILITY*)HeaderAddress;\r
+\r
+ ShellPrintHiiEx(\r
+ -1, -1, NULL, \r
+ STRING_TOKEN (STR_PCI_EXT_CAP_ARI), \r
+ gShellDebug1HiiHandle, \r
+ Header->AriCapability,\r
+ Header->AriControl\r
+ ); \r
+ DumpHex (\r
+ 4,\r
+ EFI_PCIE_CAPABILITY_BASE_OFFSET + ((UINT8*)HeaderAddress - (UINT8*)HeadersBaseAddress),\r
+ sizeof(PCI_EXPRESS_EXTENDED_CAPABILITIES_ARI_CAPABILITY),\r
+ (VOID *) (HeaderAddress)\r
+ );\r
+ return (EFI_SUCCESS);\r
+}\r
+\r
+/**\r
+ Function to interpret and print out the DPA structure\r
+\r
+ @param[in] HeaderAddress The Address of this capability header.\r
+ @param[in] HeadersBaseAddress The address of all the extended capability headers.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PrintInterpretedExtendedCompatibilityDynamicPowerAllocation (\r
+ IN CONST PCI_EXP_EXT_HDR *HeaderAddress,\r
+ IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress\r
+ )\r
+{\r
+ CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_DYNAMIC_POWER_ALLOCATION *Header;\r
+ UINT8 LinkCount;\r
+ Header = (PCI_EXPRESS_EXTENDED_CAPABILITIES_DYNAMIC_POWER_ALLOCATION*)HeaderAddress;\r
+\r
+ ShellPrintHiiEx(\r
+ -1, -1, NULL, \r
+ STRING_TOKEN (STR_PCI_EXT_CAP_DPA), \r
+ gShellDebug1HiiHandle, \r
+ Header->DpaCapability,\r
+ Header->DpaLatencyIndicator,\r
+ Header->DpaStatus,\r
+ Header->DpaControl\r
+ ); \r
+ for (LinkCount = 0 ; LinkCount < PCI_EXPRESS_EXTENDED_CAPABILITY_DYNAMIC_POWER_ALLOCATION_GET_SUBSTATE_MAX(Header) + 1 ; LinkCount++) {\r
+ ShellPrintHiiEx(\r
+ -1, -1, NULL, \r
+ STRING_TOKEN (STR_PCI_EXT_CAP_DPA2), \r
+ gShellDebug1HiiHandle, \r
+ LinkCount+1,\r
+ Header->DpaPowerAllocationArray[LinkCount]\r
+ );\r
+ }\r
+ DumpHex (\r
+ 4,\r
+ EFI_PCIE_CAPABILITY_BASE_OFFSET + ((UINT8*)HeaderAddress - (UINT8*)HeadersBaseAddress),\r
+ sizeof(PCI_EXPRESS_EXTENDED_CAPABILITIES_DYNAMIC_POWER_ALLOCATION) - 1 + PCI_EXPRESS_EXTENDED_CAPABILITY_DYNAMIC_POWER_ALLOCATION_GET_SUBSTATE_MAX(Header),\r
+ (VOID *) (HeaderAddress)\r
+ );\r
+ return (EFI_SUCCESS);\r
+}\r
+\r
+/**\r
+ Function to interpret and print out the link declaration structure\r
+\r
+ @param[in] HeaderAddress The Address of this capability header.\r
+ @param[in] HeadersBaseAddress The address of all the extended capability headers.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PrintInterpretedExtendedCompatibilityLinkDeclaration (\r
+ IN CONST PCI_EXP_EXT_HDR *HeaderAddress,\r
+ IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress\r
+ )\r
+{\r
+ CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_LINK_DECLARATION *Header;\r
+ UINT8 LinkCount;\r
+ Header = (PCI_EXPRESS_EXTENDED_CAPABILITIES_LINK_DECLARATION*)HeaderAddress;\r
+\r
+ ShellPrintHiiEx(\r
+ -1, -1, NULL, \r
+ STRING_TOKEN (STR_PCI_EXT_CAP_LINK_DECLAR), \r
+ gShellDebug1HiiHandle, \r
+ Header->ElementSelfDescription\r
+ );\r
+\r
+ for (LinkCount = 0 ; LinkCount < PCI_EXPRESS_EXTENDED_CAPABILITY_LINK_DECLARATION_GET_LINK_COUNT(Header) ; LinkCount++) {\r
+ ShellPrintHiiEx(\r
+ -1, -1, NULL, \r
+ STRING_TOKEN (STR_PCI_EXT_CAP_LINK_DECLAR2), \r
+ gShellDebug1HiiHandle, \r
+ LinkCount+1,\r
+ Header->LinkEntry[LinkCount]\r
+ );\r
+ }\r
+ DumpHex (\r
+ 4,\r
+ EFI_PCIE_CAPABILITY_BASE_OFFSET + ((UINT8*)HeaderAddress - (UINT8*)HeadersBaseAddress),\r
+ sizeof(PCI_EXPRESS_EXTENDED_CAPABILITIES_LINK_DECLARATION) + (PCI_EXPRESS_EXTENDED_CAPABILITY_LINK_DECLARATION_GET_LINK_COUNT(Header)-1)*sizeof(UINT32),\r
+ (VOID *) (HeaderAddress)\r
+ );\r
+ return (EFI_SUCCESS);\r
+}\r
+\r
+/**\r
+ Function to interpret and print out the Advanced Error Reporting structure\r
+\r
+ @param[in] HeaderAddress The Address of this capability header.\r
+ @param[in] HeadersBaseAddress The address of all the extended capability headers.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PrintInterpretedExtendedCompatibilityAer (\r
+ IN CONST PCI_EXP_EXT_HDR *HeaderAddress,\r
+ IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress\r
+ )\r
+{\r
+ CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_ADVANCED_ERROR_REPORTING *Header;\r
+ Header = (PCI_EXPRESS_EXTENDED_CAPABILITIES_ADVANCED_ERROR_REPORTING*)HeaderAddress;\r
+\r
+ ShellPrintHiiEx(\r
+ -1, -1, NULL, \r
+ STRING_TOKEN (STR_PCI_EXT_CAP_AER), \r
+ gShellDebug1HiiHandle, \r
+ Header->UncorrectableErrorStatus,\r
+ Header->UncorrectableErrorMask,\r
+ Header->UncorrectableErrorSeverity,\r
+ Header->CorrectableErrorStatus,\r
+ Header->CorrectableErrorMask,\r
+ Header->AdvancedErrorCapabilitiesAndControl,\r
+ Header->HeaderLog,\r
+ Header->RootErrorCommand,\r
+ Header->RootErrorStatus,\r
+ Header->ErrorSourceIdentification,\r
+ Header->CorrectableErrorSourceIdentification,\r
+ Header->TlpPrefixLog[0],\r
+ Header->TlpPrefixLog[1],\r
+ Header->TlpPrefixLog[2],\r
+ Header->TlpPrefixLog[3]\r
+ );\r
+ DumpHex (\r
+ 4,\r
+ EFI_PCIE_CAPABILITY_BASE_OFFSET + ((UINT8*)HeaderAddress - (UINT8*)HeadersBaseAddress),\r
+ sizeof(PCI_EXPRESS_EXTENDED_CAPABILITIES_ADVANCED_ERROR_REPORTING),\r
+ (VOID *) (HeaderAddress)\r
+ );\r
+ return (EFI_SUCCESS);\r
+}\r
+\r
+/**\r
+ Function to interpret and print out the multicast structure\r
+\r
+ @param[in] HeaderAddress The Address of this capability header.\r
+ @param[in] HeadersBaseAddress The address of all the extended capability headers.\r
+ @param[in] PciExpressCapPtr The address of the PCIe capabilities structure.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PrintInterpretedExtendedCompatibilityMulticast (\r
+ IN CONST PCI_EXP_EXT_HDR *HeaderAddress,\r
+ IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress,\r
+ IN CONST PCIE_CAP_STURCTURE *PciExpressCapPtr\r
+ )\r
+{\r
+ CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_MULTICAST *Header;\r
+ Header = (PCI_EXPRESS_EXTENDED_CAPABILITIES_MULTICAST*)HeaderAddress;\r
+\r
+ ShellPrintHiiEx(\r
+ -1, -1, NULL, \r
+ STRING_TOKEN (STR_PCI_EXT_CAP_MULTICAST), \r
+ gShellDebug1HiiHandle, \r
+ Header->MultiCastCapability,\r
+ Header->MulticastControl,\r
+ Header->McBaseAddress,\r
+ Header->McReceiveAddress,\r
+ Header->McBlockAll,\r
+ Header->McBlockUntranslated,\r
+ Header->McOverlayBar\r
+ );\r
+\r
+ DumpHex (\r
+ 4,\r
+ EFI_PCIE_CAPABILITY_BASE_OFFSET + ((UINT8*)HeaderAddress - (UINT8*)HeadersBaseAddress),\r
+ sizeof(PCI_EXPRESS_EXTENDED_CAPABILITIES_MULTICAST),\r
+ (VOID *) (HeaderAddress)\r
+ );\r
+\r
+ return (EFI_SUCCESS);\r
+}\r
+\r
+/**\r
+ Function to interpret and print out the virtual channel and multi virtual channel structure\r
+\r
+ @param[in] HeaderAddress The Address of this capability header.\r
+ @param[in] HeadersBaseAddress The address of all the extended capability headers.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PrintInterpretedExtendedCompatibilityVirtualChannel (\r
+ IN CONST PCI_EXP_EXT_HDR *HeaderAddress,\r
+ IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress\r
+ )\r
+{\r
+ CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_VIRTUAL_CHANNEL_CAPABILITY *Header;\r
+ CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_VIRTUAL_CHANNEL_VC *CapabilityItem;\r
+ UINT32 ItemCount;\r
+ Header = (PCI_EXPRESS_EXTENDED_CAPABILITIES_VIRTUAL_CHANNEL_CAPABILITY*)HeaderAddress;\r
+\r
+ ShellPrintHiiEx(\r
+ -1, -1, NULL, \r
+ STRING_TOKEN (STR_PCI_EXT_CAP_VC_BASE), \r
+ gShellDebug1HiiHandle, \r
+ Header->ExtendedVcCount,\r
+ Header->PortVcCapability1,\r
+ Header->PortVcCapability2,\r
+ Header->VcArbTableOffset,\r
+ Header->PortVcControl,\r
+ Header->PortVcStatus\r
+ );\r
+ for (ItemCount = 0 ; ItemCount < Header->ExtendedVcCount ; ItemCount++) {\r
+ CapabilityItem = &Header->Capability[ItemCount];\r
+ ShellPrintHiiEx(\r
+ -1, -1, NULL, \r
+ STRING_TOKEN (STR_PCI_EXT_CAP_VC_ITEM), \r
+ gShellDebug1HiiHandle, \r
+ ItemCount+1,\r
+ CapabilityItem->VcResourceCapability,\r
+ CapabilityItem->PortArbTableOffset,\r
+ CapabilityItem->VcResourceControl,\r
+ CapabilityItem->VcResourceStatus\r
+ );\r
+ }\r
+\r
+ DumpHex (\r
+ 4,\r
+ EFI_PCIE_CAPABILITY_BASE_OFFSET + ((UINT8*)HeaderAddress - (UINT8*)HeadersBaseAddress),\r
+ sizeof(PCI_EXPRESS_EXTENDED_CAPABILITIES_VIRTUAL_CHANNEL_VC) + (Header->ExtendedVcCount - 1) * sizeof(PCI_EXPRESS_EXTENDED_CAPABILITIES_VIRTUAL_CHANNEL_CAPABILITY),\r
+ (VOID *) (HeaderAddress)\r
+ );\r
+\r
+ return (EFI_SUCCESS);\r
+}\r
+\r
+/**\r
+ Function to interpret and print out the resizeable bar structure\r
+\r
+ @param[in] HeaderAddress The Address of this capability header.\r
+ @param[in] HeadersBaseAddress The address of all the extended capability headers.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PrintInterpretedExtendedCompatibilityResizeableBar (\r
+ IN CONST PCI_EXP_EXT_HDR *HeaderAddress,\r
+ IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress\r
+ )\r
+{\r
+ CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR *Header;\r
+ UINT32 ItemCount;\r
+ Header = (PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR*)HeaderAddress;\r
+\r
+ for (ItemCount = 0 ; ItemCount < (UINT32)GET_NUMBER_RESIZABLE_BARS(Header) ; ItemCount++) {\r
+ ShellPrintHiiEx(\r
+ -1, -1, NULL, \r
+ STRING_TOKEN (STR_PCI_EXT_CAP_RESIZE_BAR), \r
+ gShellDebug1HiiHandle, \r
+ ItemCount+1,\r
+ Header->Capability[ItemCount].ResizableBarCapability,\r
+ Header->Capability[ItemCount].ResizableBarControl\r
+ );\r
+ }\r
+\r
+ DumpHex (\r
+ 4,\r
+ EFI_PCIE_CAPABILITY_BASE_OFFSET + ((UINT8*)HeaderAddress - (UINT8*)HeadersBaseAddress),\r
+ (UINT32)GET_NUMBER_RESIZABLE_BARS(Header) * sizeof(PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR_ENTRY),\r
+ (VOID *) (HeaderAddress)\r
+ );\r
+\r
+ return (EFI_SUCCESS);\r
+}\r
+\r
+/**\r
+ Function to interpret and print out the TPH structure\r
+\r
+ @param[in] HeaderAddress The Address of this capability header.\r
+ @param[in] HeadersBaseAddress The address of all the extended capability headers.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PrintInterpretedExtendedCompatibilityTph (\r
+ IN CONST PCI_EXP_EXT_HDR *HeaderAddress,\r
+ IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress\r
+ )\r
+{\r
+ CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_TPH *Header;\r
+ Header = (PCI_EXPRESS_EXTENDED_CAPABILITIES_TPH*)HeaderAddress;\r
+\r
+ ShellPrintHiiEx(\r
+ -1, -1, NULL, \r
+ STRING_TOKEN (STR_PCI_EXT_CAP_TPH), \r
+ gShellDebug1HiiHandle, \r
+ Header->TphRequesterCapability,\r
+ Header->TphRequesterControl\r
+ );\r
+ DumpHex (\r
+ 8,\r
+ EFI_PCIE_CAPABILITY_BASE_OFFSET + ((UINT8*)Header->TphStTable - (UINT8*)HeadersBaseAddress),\r
+ GET_TPH_TABLE_SIZE(Header),\r
+ (VOID *)Header->TphStTable\r
+ );\r
+\r
+ DumpHex (\r
+ 4,\r
+ EFI_PCIE_CAPABILITY_BASE_OFFSET + ((UINT8*)HeaderAddress - (UINT8*)HeadersBaseAddress),\r
+ sizeof(PCI_EXPRESS_EXTENDED_CAPABILITIES_TPH) + GET_TPH_TABLE_SIZE(Header) - sizeof(UINT16),\r
+ (VOID *) (HeaderAddress)\r
+ );\r
+\r
+ return (EFI_SUCCESS);\r
+}\r
+\r
+/**\r
+ Function to interpret and print out the secondary PCIe capability structure\r
+\r
+ @param[in] HeaderAddress The Address of this capability header.\r
+ @param[in] HeadersBaseAddress The address of all the extended capability headers.\r
+ @param[in] PciExpressCapPtr The address of the PCIe capabilities structure.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PrintInterpretedExtendedCompatibilitySecondary (\r
+ IN CONST PCI_EXP_EXT_HDR *HeaderAddress,\r
+ IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress,\r
+ IN CONST PCIE_CAP_STURCTURE *PciExpressCapPtr\r
+ )\r
+{\r
+ CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_SECONDARY_PCIE *Header;\r
+ Header = (PCI_EXPRESS_EXTENDED_CAPABILITIES_SECONDARY_PCIE*)HeaderAddress;\r
+\r
+ ShellPrintHiiEx(\r
+ -1, -1, NULL, \r
+ STRING_TOKEN (STR_PCI_EXT_CAP_SECONDARY), \r
+ gShellDebug1HiiHandle, \r
+ Header->LinkControl3,\r
+ Header->LaneErrorStatus\r
+ );\r
+ DumpHex (\r
+ 8,\r
+ EFI_PCIE_CAPABILITY_BASE_OFFSET + ((UINT8*)Header->EqualizationControl - (UINT8*)HeadersBaseAddress),\r
+ PCIE_CAP_MAX_LINK_WIDTH(PciExpressCapPtr->LinkCap),\r
+ (VOID *)Header->EqualizationControl\r
+ );\r
+\r
+ DumpHex (\r
+ 4,\r
+ EFI_PCIE_CAPABILITY_BASE_OFFSET + ((UINT8*)HeaderAddress - (UINT8*)HeadersBaseAddress),\r
+ sizeof(PCI_EXPRESS_EXTENDED_CAPABILITIES_TPH) - sizeof(Header->EqualizationControl) + PCIE_CAP_MAX_LINK_WIDTH(PciExpressCapPtr->LinkCap),\r
+ (VOID *) (HeaderAddress)\r
+ );\r
+\r
+ return (EFI_SUCCESS);\r
+}\r
+\r
+/**\r
+ Display Pcie extended capability details\r
+\r
+ @param[in] HeadersBaseAddress The address of all the extended capability headers.\r
+ @param[in] HeaderAddress The address of this capability header.\r
+ @param[in] PciExpressCapPtr The address of the PCIe capabilities structure.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+PrintPciExtendedCapabilityDetails(\r
+ IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress, \r
+ IN CONST PCI_EXP_EXT_HDR *HeaderAddress,\r
+ IN CONST PCIE_CAP_STURCTURE *PciExpressCapPtr\r
+ )\r
+{\r
+ switch (HeaderAddress->CapabilityId){\r
+ case PCI_EXPRESS_EXTENDED_CAPABILITY_ADVANCED_ERROR_REPORTING_ID:\r
+ return PrintInterpretedExtendedCompatibilityAer(HeaderAddress, HeadersBaseAddress);\r
+ case PCI_EXPRESS_EXTENDED_CAPABILITY_LINK_CONTROL_ID:\r
+ return PrintInterpretedExtendedCompatibilityLinkControl(HeaderAddress, HeadersBaseAddress);\r
+ case PCI_EXPRESS_EXTENDED_CAPABILITY_LINK_DECLARATION_ID:\r
+ return PrintInterpretedExtendedCompatibilityLinkDeclaration(HeaderAddress, HeadersBaseAddress);\r
+ case PCI_EXPRESS_EXTENDED_CAPABILITY_SERIAL_NUMBER_ID:\r
+ return PrintInterpretedExtendedCompatibilitySerialNumber(HeaderAddress, HeadersBaseAddress);\r
+ case PCI_EXPRESS_EXTENDED_CAPABILITY_POWER_BUDGETING_ID:\r
+ return PrintInterpretedExtendedCompatibilityPowerBudgeting(HeaderAddress, HeadersBaseAddress);\r
+ case PCI_EXPRESS_EXTENDED_CAPABILITY_ACS_EXTENDED_ID:\r
+ return PrintInterpretedExtendedCompatibilityAcs(HeaderAddress, HeadersBaseAddress);\r
+ case PCI_EXPRESS_EXTENDED_CAPABILITY_LATENCE_TOLERANCE_REPORTING_ID:\r
+ return PrintInterpretedExtendedCompatibilityLatencyToleranceReporting(HeaderAddress, HeadersBaseAddress);\r
+ case PCI_EXPRESS_EXTENDED_CAPABILITY_ARI_CAPABILITY_ID:\r
+ return PrintInterpretedExtendedCompatibilityAri(HeaderAddress, HeadersBaseAddress);\r
+ case PCI_EXPRESS_EXTENDED_CAPABILITY_RCRB_HEADER_ID:\r
+ return PrintInterpretedExtendedCompatibilityRcrb(HeaderAddress, HeadersBaseAddress);\r
+ case PCI_EXPRESS_EXTENDED_CAPABILITY_VENDOR_SPECIFIC_ID:\r
+ return PrintInterpretedExtendedCompatibilityVendorSpecific(HeaderAddress, HeadersBaseAddress);\r
+ case PCI_EXPRESS_EXTENDED_CAPABILITY_DYNAMIC_POWER_ALLOCATION_ID:\r
+ return PrintInterpretedExtendedCompatibilityDynamicPowerAllocation(HeaderAddress, HeadersBaseAddress);\r
+ case PCI_EXPRESS_EXTENDED_CAPABILITY_EVENT_COLLECTOR_ENDPOINT_ASSOCIATION_ID:\r
+ return PrintInterpretedExtendedCompatibilityECEA(HeaderAddress, HeadersBaseAddress);\r
+ case PCI_EXPRESS_EXTENDED_CAPABILITY_VIRTUAL_CHANNEL_ID:\r
+ case PCI_EXPRESS_EXTENDED_CAPABILITY_MULTI_FUNCTION_VIRTUAL_CHANNEL_ID:\r
+ return PrintInterpretedExtendedCompatibilityVirtualChannel(HeaderAddress, HeadersBaseAddress);\r
+ case PCI_EXPRESS_EXTENDED_CAPABILITY_MULTICAST_ID: \r
+ //\r
+ // should only be present if PCIE_CAP_DEVICEPORT_TYPE(PciExpressCapPtr->PcieCapReg) == 0100b, 0101b, or 0110b\r
+ //\r
+ return PrintInterpretedExtendedCompatibilityMulticast(HeaderAddress, HeadersBaseAddress, PciExpressCapPtr);\r
+ case PCI_EXPRESS_EXTENDED_CAPABILITY_RESIZABLE_BAR_ID:\r
+ return PrintInterpretedExtendedCompatibilityResizeableBar(HeaderAddress, HeadersBaseAddress);\r
+ case PCI_EXPRESS_EXTENDED_CAPABILITY_TPH_ID:\r
+ return PrintInterpretedExtendedCompatibilityTph(HeaderAddress, HeadersBaseAddress);\r
+ case PCI_EXPRESS_EXTENDED_CAPABILITY_SECONDARY_PCIE_ID:\r
+ return PrintInterpretedExtendedCompatibilitySecondary(HeaderAddress, HeadersBaseAddress, PciExpressCapPtr);\r
+ default:\r
+ ShellPrintEx (-1, -1,\r
+ L"Unknown PCIe extended capability ID (%04xh). No interpretation available.\r\n",\r
+ HeaderAddress->CapabilityId\r
+ );\r
+ return EFI_SUCCESS;\r
+ };\r
+\r
+}\r
+\r