bits 23:16 - Base Class Code\r
bits 15:8 - Sub-Class Code\r
bits 7:0 - Programming Interface\r
- @param[in,out] ClassStrings Pointer of PCI_CLASS_STRINGS structure, which contains\r
+ @param[in, out] ClassStrings Pointer of PCI_CLASS_STRINGS structure, which contains\r
printable class strings corresponding to ClassCode. The\r
caller must not modify the strings that are pointed by\r
the fields in ClassStrings.\r
It also moves the pointer backward a node, to get prepared to be called\r
again.\r
\r
- @param[in,out] Descriptors Points to current position of a serial of address space\r
- descriptors.\r
- @param[out] MinBus The lower range of bus number.\r
- @param[out] ManBus The upper range of bus number.\r
- @param[out] IsEnd Meet end of the serial of descriptors.\r
+ @param[in, out] Descriptors Points to current position of a serial of address space\r
+ descriptors.\r
+ @param[out] MinBus The lower range of bus number.\r
+ @param[out] MaxBus The upper range of bus number.\r
+ @param[out] IsEnd Meet end of the serial of descriptors.\r
\r
@retval EFI_SUCCESS The command completed successfully.\r
**/\r
/**\r
Explain the Base Address Register(Bar) in PCI configuration space.\r
\r
- @param[in] Bar Points to the Base Address Register intended to interpret.\r
- @param[in] Command Points to the register Command.\r
- @param[in] Address Address used to access configuration space of this PCI device.\r
- @param[in] IoDev Handle used to access configuration space of PCI device.\r
- @param[in,out] Index The Index.\r
+ @param[in] Bar Points to the Base Address Register intended to interpret.\r
+ @param[in] Command Points to the register Command.\r
+ @param[in] Address Address used to access configuration space of this PCI device.\r
+ @param[in] IoDev Handle used to access configuration space of PCI device.\r
+ @param[in, out] Index The Index.\r
\r
@retval EFI_SUCCESS The command completed successfully.\r
**/\r
LIST_ENTRY *Package;\r
CHAR16 *ProblemParam;\r
SHELL_STATUS ShellStatus;\r
- UINTN Size;\r
CONST CHAR16 *Temp;\r
\r
ShellStatus = SHELL_SUCCESS;\r
Status = EFI_SUCCESS;\r
Address = 0;\r
- Size = 0;\r
IoDev = NULL;\r
HandleBuf = NULL;\r
Package = NULL;\r
{\r
UINTN Index;\r
EFI_STATUS Status;\r
- BOOLEAN FoundInterface;\r
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptors;\r
UINT16 MinBus;\r
UINT16 MaxBus;\r
BOOLEAN IsEnd;\r
\r
- FoundInterface = FALSE;\r
//\r
// Go through all handles, until the one meets the criteria is found\r
//\r
}\r
\r
if (MinBus <= Bus && MaxBus >= Bus) {\r
- FoundInterface = TRUE;\r
- break;\r
+ return EFI_SUCCESS;\r
}\r
}\r
}\r
\r
- if (FoundInterface) {\r
- return EFI_SUCCESS;\r
- } else {\r
- return EFI_INVALID_PARAMETER;\r
- }\r
+ return EFI_NOT_FOUND;\r
}\r
\r
/**\r
It also moves the pointer backward a node, to get prepared to be called\r
again.\r
\r
- @param[in,out] Descriptors Points to current position of a serial of address space\r
- descriptors.\r
- @param[out] MinBus The lower range of bus number.\r
- @param[out] ManBus The upper range of bus number.\r
- @param[out] IsEnd Meet end of the serial of descriptors.\r
+ @param[in, out] Descriptors Points to current position of a serial of address space\r
+ descriptors.\r
+ @param[out] MinBus The lower range of bus number.\r
+ @param[out] MaxBus The upper range of bus number.\r
+ @param[out] IsEnd Meet end of the serial of descriptors.\r
\r
@retval EFI_SUCCESS The command completed successfully.\r
**/\r
);\r
CapPtr = ConfigSpace->NonCommon.CardBus.CapabilitiesPtr;\r
break;\r
+ case PciUndefined:\r
+ default:\r
+ break;\r
}\r
//\r
// If Status bit4 is 1, dump or explain capability structure\r
/**\r
Explain the Base Address Register(Bar) in PCI configuration space.\r
\r
- @param[in] Bar Points to the Base Address Register intended to interpret.\r
- @param[in] Command Points to the register Command.\r
- @param[in] Address Address used to access configuration space of this PCI device.\r
- @param[in] IoDev Handle used to access configuration space of PCI device.\r
- @param[in,out] Index The Index.\r
+ @param[in] Bar Points to the Base Address Register intended to interpret.\r
+ @param[in] Command Points to the register Command.\r
+ @param[in] Address Address used to access configuration space of this PCI device.\r
+ @param[in] IoDev Handle used to access configuration space of PCI device.\r
+ @param[in, out] Index The Index.\r
\r
@retval EFI_SUCCESS The command completed successfully.\r
**/\r
} else if ((*Bar & PCI_BIT_1) == 0 && (*Bar & PCI_BIT_2) != 0) {\r
Bar64 = 0x0;\r
CopyMem (&Bar64, Bar, sizeof (UINT64));\r
- ShellPrintHiiEx(-1, -1, NULL,STRING_TOKEN (STR_PCI2_ONE_VAR_2), gShellDebug1HiiHandle, RShiftU64 ((Bar64 & 0xfffffffffffffff0), 32));\r
- ShellPrintHiiEx(-1, -1, NULL,STRING_TOKEN (STR_PCI2_ONE_VAR_3), gShellDebug1HiiHandle, (UINT32) (Bar64 & 0xfffffffffffffff0));\r
+ ShellPrintHiiEx(-1, -1, NULL,STRING_TOKEN (STR_PCI2_ONE_VAR_2), gShellDebug1HiiHandle, (UINT32) RShiftU64 ((Bar64 & 0xfffffffffffffff0ULL), 32));\r
+ ShellPrintHiiEx(-1, -1, NULL,STRING_TOKEN (STR_PCI2_ONE_VAR_3), gShellDebug1HiiHandle, (UINT32) (Bar64 & 0xfffffffffffffff0ULL));\r
ShellPrintHiiEx(-1, -1, NULL,STRING_TOKEN (STR_PCI2_MEM), gShellDebug1HiiHandle);\r
ShellPrintHiiEx(-1, -1, NULL,STRING_TOKEN (STR_PCI2_64_BITS), gShellDebug1HiiHandle);\r
IsBar32 = FALSE;\r
\r
OldBar64 = 0x0;\r
CopyMem (&OldBar64, Bar, sizeof (UINT64));\r
- NewBar64 = 0xffffffffffffffff;\r
+ NewBar64 = 0xffffffffffffffffULL;\r
\r
IoDev->Pci.Write (IoDev, EfiPciWidthUint32, RegAddress, 2, &NewBar64);\r
IoDev->Pci.Read (IoDev, EfiPciWidthUint32, RegAddress, 2, &NewBar64);\r
IoDev->Pci.Write (IoDev, EfiPciWidthUint32, RegAddress, 2, &OldBar64);\r
\r
if (IsMem) {\r
- NewBar64 = NewBar64 & 0xfffffffffffffff0;\r
+ NewBar64 = NewBar64 & 0xfffffffffffffff0ULL;\r
NewBar64 = (~NewBar64) + 1;\r
\r
} else {\r
- NewBar64 = NewBar64 & 0xfffffffffffffffc;\r
+ NewBar64 = NewBar64 & 0xfffffffffffffffcULL;\r
NewBar64 = (~NewBar64) + 1;\r
NewBar64 = NewBar64 & 0x000000000000ffff;\r
}\r
ShellPrintHiiEx(-1, -1, NULL,STRING_TOKEN (STR_PCI2_NEWBAR_32_2), gShellDebug1HiiHandle, NewBar32 + (*Bar & 0xfffffff0) - 1);\r
\r
} else {\r
- ShellPrintHiiEx(-1, -1, NULL,STRING_TOKEN (STR_PCI2_RSHIFT), gShellDebug1HiiHandle, RShiftU64 (NewBar64, 32));\r
+ ShellPrintHiiEx(-1, -1, NULL,STRING_TOKEN (STR_PCI2_RSHIFT), gShellDebug1HiiHandle, (UINT32) RShiftU64 (NewBar64, 32));\r
ShellPrintHiiEx(-1, -1, NULL,STRING_TOKEN (STR_PCI2_RSHIFT), gShellDebug1HiiHandle, (UINT32) NewBar64);\r
Print (L" ");\r
ShellPrintHiiEx(-1, -1, NULL,\r
STRING_TOKEN (STR_PCI2_RSHIFT),\r
gShellDebug1HiiHandle,\r
- RShiftU64 ((NewBar64 + (Bar64 & 0xfffffffffffffff0) - 1), 32)\r
+ (UINT32) RShiftU64 ((NewBar64 + (Bar64 & 0xfffffffffffffff0ULL) - 1), 32)\r
);\r
- ShellPrintHiiEx(-1, -1, NULL,STRING_TOKEN (STR_PCI2_RSHIFT), gShellDebug1HiiHandle, (UINT32) (NewBar64 + (Bar64 & 0xfffffffffffffff0) - 1));\r
+ ShellPrintHiiEx(-1, -1, NULL,STRING_TOKEN (STR_PCI2_RSHIFT), gShellDebug1HiiHandle, (UINT32) (NewBar64 + (Bar64 & 0xfffffffffffffff0ULL) - 1));\r
\r
}\r
} else {\r
INDEX_OF (&(CardBus->IoBase0)),\r
Io32Bit ? L" 32 bit" : L" 16 bit",\r
CardBus->IoBase0 & (Io32Bit ? 0xfffffffc : 0x0000fffc),\r
- CardBus->IoLimit0 & (Io32Bit ? 0xffffffff : 0x0000ffff) | 0x00000003\r
+ (CardBus->IoLimit0 & (Io32Bit ? 0xffffffff : 0x0000ffff)) | 0x00000003\r
);\r
\r
Io32Bit = (BOOLEAN) (CardBus->IoBase1 & PCI_BIT_0);\r
INDEX_OF (&(CardBus->IoBase1)),\r
Io32Bit ? L" 32 bit" : L" 16 bit",\r
CardBus->IoBase1 & (Io32Bit ? 0xfffffffc : 0x0000fffc),\r
- CardBus->IoLimit1 & (Io32Bit ? 0xffffffff : 0x0000ffff) | 0x00000003\r
+ (CardBus->IoLimit1 & (Io32Bit ? 0xffffffff : 0x0000ffff)) | 0x00000003\r
);\r
\r
//\r
//\r
Print (L"\n%HStart dumping PCIex extended configuration space (0x100 - 0xFFF).%N\n\n");\r
\r
- DumpHex (\r
- 2,\r
- 0x100,\r
- ExtendRegSize,\r
- (VOID *) (ExRegBuffer)\r
- );\r
+ if (ExRegBuffer != NULL) {\r
+ DumpHex (\r
+ 2,\r
+ 0x100,\r
+ ExtendRegSize,\r
+ (VOID *) (ExRegBuffer)\r
+ );\r
\r
- FreePool ((VOID *) ExRegBuffer);\r
+ FreePool ((VOID *) ExRegBuffer);\r
+ }\r
\r
Done:\r
return EFI_SUCCESS;\r
projects / mirror_edk2.git / blobdiff