/** @file\r
Debug Agent library implementition.\r
\r
- Copyright (c) 2010 - 2016, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
UINTN mSavedDebugRegisters[6];\r
IA32_IDT_GATE_DESCRIPTOR mIdtEntryTable[33];\r
BOOLEAN mSkipBreakpoint = FALSE;\r
+BOOLEAN mSmmDebugIdtInitFlag = FALSE;\r
\r
CHAR8 mWarningMsgIgnoreSmmEntryBreak[] = "Ignore smmentrybreak setting for SMI issued during DXE debugging!\r\n";\r
\r
\r
case DEBUG_AGENT_INIT_ENTER_SMI:\r
SaveDebugRegister ();\r
- InitializeDebugIdt ();\r
+ if (!mSmmDebugIdtInitFlag) {\r
+ //\r
+ // We only need to initialize Debug IDT table at first SMI entry\r
+ // after SMM relocation.\r
+ //\r
+ InitializeDebugIdt ();\r
+ mSmmDebugIdtInitFlag = TRUE;\r
+ }\r
//\r
// Check if CPU APIC Timer is working, otherwise initialize it.\r
//\r
} else {\r
Ia32Idtr = (IA32_DESCRIPTOR *) Context;\r
Ia32IdtEntry = (IA32_IDT_ENTRY *)(Ia32Idtr->Base);\r
- MailboxLocation = (UINT64 *) (UINTN) (Ia32IdtEntry[DEBUG_MAILBOX_VECTOR].Bits.OffsetLow + \r
- (UINT32) (Ia32IdtEntry[DEBUG_MAILBOX_VECTOR].Bits.OffsetHigh << 16));\r
+ MailboxLocation = (UINT64 *) ((UINTN) Ia32IdtEntry[DEBUG_MAILBOX_VECTOR].Bits.OffsetLow +\r
+ ((UINTN) Ia32IdtEntry[DEBUG_MAILBOX_VECTOR].Bits.OffsetHigh << 16));\r
mMailboxPointer = (DEBUG_AGENT_MAILBOX *)(UINTN)(*MailboxLocation);\r
VerifyMailboxChecksum (mMailboxPointer);\r
//\r