Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>\r
Copyright (c) 2016 - 2018, ARM Limited. All rights reserved.<BR>\r
\r
-This program and the accompanying materials are licensed and made available under\r
-the terms and conditions of the BSD License that accompanies this distribution.\r
-The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php.\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
@par Revision Reference:\r
GUIDs defined in MmCis spec version 0.9.\r
/// In Framework MM CIS 0.91 specification, it defines the field type as UINTN.\r
/// However, HOBs are supposed to be CPU neutral, so UINT32 should be used instead.\r
///\r
- UINT32 NumberOfMmReservedRegions;\r
+ UINT32 NumberOfMmReservedRegions;\r
///\r
/// Used throughout this protocol to describe the candidate\r
/// regions for MMRAM that are supported by this platform.\r
///\r
- EFI_MMRAM_DESCRIPTOR Descriptor[1];\r
+ EFI_MMRAM_DESCRIPTOR Descriptor[1];\r
} EFI_MMRAM_HOB_DESCRIPTOR_BLOCK;\r
\r
-extern EFI_GUID gEfiMmPeiSmramMemoryReserveGuid;\r
+extern EFI_GUID gEfiMmPeiSmramMemoryReserveGuid;\r
\r
#endif\r
-\r