--- /dev/null
+/* $NetBSD: fenv.h,v 1.2 2014/01/29 00:22:09 matt Exp $ */\r
+/** @file\r
+*\r
+* Copyright (c) 2013 - 2014, ARM Limited. All rights reserved.\r
+*\r
+* This program and the accompanying materials\r
+* are licensed and made available under the terms and conditions of the BSD License\r
+* which accompanies this distribution. The full text of the license may be found at\r
+* http://opensource.org/licenses/bsd-license.php\r
+*\r
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+*\r
+**/\r
+ /*\r
+ * Based on ieeefp.h written by J.T. Conklin, Apr 28, 1995\r
+ * Public domain.\r
+ */\r
+\r
+#ifndef _ARM_FENV_H_\r
+#define _ARM_FENV_H_\r
+\r
+#ifdef __ARM_PCS_AAPCS64\r
+/* AArch64 split FPSCR into two registers FPCR and FPSR */\r
+typedef struct {\r
+ unsigned int __fpcr;\r
+ unsigned int __fpsr;\r
+} fenv_t;\r
+#else\r
+typedef int fenv_t; /* FPSCR */\r
+#endif\r
+typedef int fexcept_t;\r
+\r
+#define FE_INVALID 0x01 /* invalid operation exception */\r
+#define FE_DIVBYZERO 0x02 /* divide-by-zero exception */\r
+#define FE_OVERFLOW 0x04 /* overflow exception */\r
+#define FE_UNDERFLOW 0x08 /* underflow exception */\r
+#define FE_INEXACT 0x10 /* imprecise (loss of precision; "inexact") */\r
+\r
+#define FE_ALL_EXCEPT 0x1f\r
+\r
+#define FE_TONEAREST 0 /* round to nearest representable number */\r
+#define FE_UPWARD 1 /* round toward positive infinity */\r
+#define FE_DOWNWARD 2 /* round toward negative infinity */\r
+#define FE_TOWARDZERO 3 /* round to zero (truncate) */\r
+\r
+__BEGIN_DECLS\r
+\r
+/* Default floating-point environment */\r
+extern const fenv_t __fe_dfl_env;\r
+#define FE_DFL_ENV (&__fe_dfl_env)\r
+\r
+__END_DECLS\r
+\r
+#endif /* _ARM_FENV_H_ */\r