--- /dev/null
+/* $NetBSD: softfloat.c,v 1.3 2013/01/10 08:16:11 matt Exp $ */\r
+\r
+/*\r
+ * This version hacked for use with gcc -msoft-float by bjh21.\r
+ * (Mostly a case of #ifdefing out things GCC doesn't need or provides\r
+ * itself).\r
+ */\r
+\r
+/*\r
+ * Things you may want to define:\r
+ *\r
+ * SOFTFLOAT_FOR_GCC - build only those functions necessary for GCC (with\r
+ * -msoft-float) to work. Include "softfloat-for-gcc.h" to get them\r
+ * properly renamed.\r
+ */\r
+\r
+/*\r
+ * This differs from the standard bits32/softfloat.c in that float64\r
+ * is defined to be a 64-bit integer rather than a structure. The\r
+ * structure is float64s, with translation between the two going via\r
+ * float64u.\r
+ */\r
+\r
+/*\r
+===============================================================================\r
+\r
+This C source file is part of the SoftFloat IEC/IEEE Floating-Point\r
+Arithmetic Package, Release 2a.\r
+\r
+Written by John R. Hauser. This work was made possible in part by the\r
+International Computer Science Institute, located at Suite 600, 1947 Center\r
+Street, Berkeley, California 94704. Funding was partially provided by the\r
+National Science Foundation under grant MIP-9311980. The original version\r
+of this code was written as part of a project to build a fixed-point vector\r
+processor in collaboration with the University of California at Berkeley,\r
+overseen by Profs. Nelson Morgan and John Wawrzynek. More information\r
+is available through the Web page `http://HTTP.CS.Berkeley.EDU/~jhauser/\r
+arithmetic/SoftFloat.html'.\r
+\r
+THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort\r
+has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT\r
+TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO\r
+PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY\r
+AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.\r
+\r
+Derivative works are acceptable, even for commercial purposes, so long as\r
+(1) they include prominent notice that the work is derivative, and (2) they\r
+include prominent notice akin to these four paragraphs for those parts of\r
+this code that are retained.\r
+\r
+===============================================================================\r
+*/\r
+\r
+#include <sys/cdefs.h>\r
+#if defined(LIBC_SCCS) && !defined(lint)\r
+__RCSID("$NetBSD: softfloat.c,v 1.3 2013/01/10 08:16:11 matt Exp $");\r
+#endif /* LIBC_SCCS and not lint */\r
+\r
+#ifdef SOFTFLOAT_FOR_GCC\r
+#include "softfloat-for-gcc.h"\r
+#endif\r
+\r
+#include "milieu.h"\r
+#include "softfloat.h"\r
+\r
+/*\r
+ * Conversions between floats as stored in memory and floats as\r
+ * SoftFloat uses them\r
+ */\r
+#ifndef FLOAT64_DEMANGLE\r
+#define FLOAT64_DEMANGLE(a) (a)\r
+#endif\r
+#ifndef FLOAT64_MANGLE\r
+#define FLOAT64_MANGLE(a) (a)\r
+#endif\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Floating-point rounding mode and exception flags.\r
+-------------------------------------------------------------------------------\r
+*/\r
+#ifndef set_float_rounding_mode\r
+fp_rnd float_rounding_mode = float_round_nearest_even;\r
+fp_except float_exception_flags = 0;\r
+#endif\r
+#ifndef set_float_exception_inexact_flag\r
+#define set_float_exception_inexact_flag() \\r
+ ((void)(float_exception_flags |= float_flag_inexact))\r
+#endif\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Primitive arithmetic functions, including multi-word arithmetic, and\r
+division and square root approximations. (Can be specialized to target if\r
+desired.)\r
+-------------------------------------------------------------------------------\r
+*/\r
+#include "softfloat-macros"\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Functions and definitions to determine: (1) whether tininess for underflow\r
+is detected before or after rounding by default, (2) what (if anything)\r
+happens when exceptions are raised, (3) how signaling NaNs are distinguished\r
+from quiet NaNs, (4) the default generated quiet NaNs, and (4) how NaNs\r
+are propagated from function inputs to output. These details are target-\r
+specific.\r
+-------------------------------------------------------------------------------\r
+*/\r
+#include "softfloat-specialize"\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the fraction bits of the single-precision floating-point value `a'.\r
+-------------------------------------------------------------------------------\r
+*/\r
+INLINE bits32 extractFloat32Frac( float32 a )\r
+{\r
+\r
+ return a & 0x007FFFFF;\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the exponent bits of the single-precision floating-point value `a'.\r
+-------------------------------------------------------------------------------\r
+*/\r
+INLINE int16 extractFloat32Exp( float32 a )\r
+{\r
+\r
+ return ( a>>23 ) & 0xFF;\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the sign bit of the single-precision floating-point value `a'.\r
+-------------------------------------------------------------------------------\r
+*/\r
+INLINE flag extractFloat32Sign( float32 a )\r
+{\r
+\r
+ return a>>31;\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Normalizes the subnormal single-precision floating-point value represented\r
+by the denormalized significand `aSig'. The normalized exponent and\r
+significand are stored at the locations pointed to by `zExpPtr' and\r
+`zSigPtr', respectively.\r
+-------------------------------------------------------------------------------\r
+*/\r
+static void\r
+ normalizeFloat32Subnormal( bits32 aSig, int16 *zExpPtr, bits32 *zSigPtr )\r
+{\r
+ int8 shiftCount;\r
+\r
+ shiftCount = countLeadingZeros32( aSig ) - 8;\r
+ *zSigPtr = aSig<<shiftCount;\r
+ *zExpPtr = 1 - shiftCount;\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Packs the sign `zSign', exponent `zExp', and significand `zSig' into a\r
+single-precision floating-point value, returning the result. After being\r
+shifted into the proper positions, the three fields are simply added\r
+together to form the result. This means that any integer portion of `zSig'\r
+will be added into the exponent. Since a properly normalized significand\r
+will have an integer portion equal to 1, the `zExp' input should be 1 less\r
+than the desired result exponent whenever `zSig' is a complete, normalized\r
+significand.\r
+-------------------------------------------------------------------------------\r
+*/\r
+INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig )\r
+{\r
+\r
+ return ( ( (bits32) zSign )<<31 ) + ( ( (bits32) zExp )<<23 ) + zSig;\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Takes an abstract floating-point value having sign `zSign', exponent `zExp',\r
+and significand `zSig', and returns the proper single-precision floating-\r
+point value corresponding to the abstract input. Ordinarily, the abstract\r
+value is simply rounded and packed into the single-precision format, with\r
+the inexact exception raised if the abstract input cannot be represented\r
+exactly. However, if the abstract value is too large, the overflow and\r
+inexact exceptions are raised and an infinity or maximal finite value is\r
+returned. If the abstract value is too small, the input value is rounded to\r
+a subnormal number, and the underflow and inexact exceptions are raised if\r
+the abstract input cannot be represented exactly as a subnormal single-\r
+precision floating-point number.\r
+ The input significand `zSig' has its binary point between bits 30\r
+and 29, which is 7 bits to the left of the usual location. This shifted\r
+significand must be normalized or smaller. If `zSig' is not normalized,\r
+`zExp' must be 0; in that case, the result returned is a subnormal number,\r
+and it must not require rounding. In the usual case that `zSig' is\r
+normalized, `zExp' must be 1 less than the ``true'' floating-point exponent.\r
+The handling of underflow and overflow follows the IEC/IEEE Standard for\r
+Binary Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig )\r
+{\r
+ int8 roundingMode;\r
+ flag roundNearestEven;\r
+ int8 roundIncrement, roundBits;\r
+ flag isTiny;\r
+\r
+ roundingMode = float_rounding_mode;\r
+ roundNearestEven = roundingMode == float_round_nearest_even;\r
+ roundIncrement = 0x40;\r
+ if ( ! roundNearestEven ) {\r
+ if ( roundingMode == float_round_to_zero ) {\r
+ roundIncrement = 0;\r
+ }\r
+ else {\r
+ roundIncrement = 0x7F;\r
+ if ( zSign ) {\r
+ if ( roundingMode == float_round_up ) roundIncrement = 0;\r
+ }\r
+ else {\r
+ if ( roundingMode == float_round_down ) roundIncrement = 0;\r
+ }\r
+ }\r
+ }\r
+ roundBits = zSig & 0x7F;\r
+ if ( 0xFD <= (bits16) zExp ) {\r
+ if ( ( 0xFD < zExp )\r
+ || ( ( zExp == 0xFD )\r
+ && ( (sbits32) ( zSig + roundIncrement ) < 0 ) )\r
+ ) {\r
+ float_raise( float_flag_overflow | float_flag_inexact );\r
+ return packFloat32( zSign, 0xFF, 0 ) - ( roundIncrement == 0 );\r
+ }\r
+ if ( zExp < 0 ) {\r
+ isTiny =\r
+ ( float_detect_tininess == float_tininess_before_rounding )\r
+ || ( zExp < -1 )\r
+ || ( zSig + roundIncrement < (uint32)0x80000000 );\r
+ shift32RightJamming( zSig, - zExp, &zSig );\r
+ zExp = 0;\r
+ roundBits = zSig & 0x7F;\r
+ if ( isTiny && roundBits ) float_raise( float_flag_underflow );\r
+ }\r
+ }\r
+ if ( roundBits ) set_float_exception_inexact_flag();\r
+ zSig = ( zSig + roundIncrement )>>7;\r
+ zSig &= ~ ( ( ( roundBits ^ 0x40 ) == 0 ) & roundNearestEven );\r
+ if ( zSig == 0 ) zExp = 0;\r
+ return packFloat32( zSign, zExp, zSig );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Takes an abstract floating-point value having sign `zSign', exponent `zExp',\r
+and significand `zSig', and returns the proper single-precision floating-\r
+point value corresponding to the abstract input. This routine is just like\r
+`roundAndPackFloat32' except that `zSig' does not have to be normalized.\r
+Bit 31 of `zSig' must be zero, and `zExp' must be 1 less than the ``true''\r
+floating-point exponent.\r
+-------------------------------------------------------------------------------\r
+*/\r
+static float32\r
+ normalizeRoundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig )\r
+{\r
+ int8 shiftCount;\r
+\r
+ shiftCount = countLeadingZeros32( zSig ) - 1;\r
+ return roundAndPackFloat32( zSign, zExp - shiftCount, zSig<<shiftCount );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the least-significant 32 fraction bits of the double-precision\r
+floating-point value `a'.\r
+-------------------------------------------------------------------------------\r
+*/\r
+INLINE bits32 extractFloat64Frac1( float64 a )\r
+{\r
+\r
+ return (bits32)(FLOAT64_DEMANGLE(a) & LIT64(0x00000000FFFFFFFF));\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the most-significant 20 fraction bits of the double-precision\r
+floating-point value `a'.\r
+-------------------------------------------------------------------------------\r
+*/\r
+INLINE bits32 extractFloat64Frac0( float64 a )\r
+{\r
+\r
+ return (bits32)((FLOAT64_DEMANGLE(a) >> 32) & 0x000FFFFF);\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the exponent bits of the double-precision floating-point value `a'.\r
+-------------------------------------------------------------------------------\r
+*/\r
+INLINE int16 extractFloat64Exp( float64 a )\r
+{\r
+\r
+ return (int16)((FLOAT64_DEMANGLE(a) >> 52) & 0x7FF);\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the sign bit of the double-precision floating-point value `a'.\r
+-------------------------------------------------------------------------------\r
+*/\r
+INLINE flag extractFloat64Sign( float64 a )\r
+{\r
+\r
+ return (flag)(FLOAT64_DEMANGLE(a) >> 63);\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Normalizes the subnormal double-precision floating-point value represented\r
+by the denormalized significand formed by the concatenation of `aSig0' and\r
+`aSig1'. The normalized exponent is stored at the location pointed to by\r
+`zExpPtr'. The most significant 21 bits of the normalized significand are\r
+stored at the location pointed to by `zSig0Ptr', and the least significant\r
+32 bits of the normalized significand are stored at the location pointed to\r
+by `zSig1Ptr'.\r
+-------------------------------------------------------------------------------\r
+*/\r
+static void\r
+ normalizeFloat64Subnormal(\r
+ bits32 aSig0,\r
+ bits32 aSig1,\r
+ int16 *zExpPtr,\r
+ bits32 *zSig0Ptr,\r
+ bits32 *zSig1Ptr\r
+ )\r
+{\r
+ int8 shiftCount;\r
+\r
+ if ( aSig0 == 0 ) {\r
+ shiftCount = countLeadingZeros32( aSig1 ) - 11;\r
+ if ( shiftCount < 0 ) {\r
+ *zSig0Ptr = aSig1>>( - shiftCount );\r
+ *zSig1Ptr = aSig1<<( shiftCount & 31 );\r
+ }\r
+ else {\r
+ *zSig0Ptr = aSig1<<shiftCount;\r
+ *zSig1Ptr = 0;\r
+ }\r
+ *zExpPtr = - shiftCount - 31;\r
+ }\r
+ else {\r
+ shiftCount = countLeadingZeros32( aSig0 ) - 11;\r
+ shortShift64Left( aSig0, aSig1, shiftCount, zSig0Ptr, zSig1Ptr );\r
+ *zExpPtr = 1 - shiftCount;\r
+ }\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Packs the sign `zSign', the exponent `zExp', and the significand formed by\r
+the concatenation of `zSig0' and `zSig1' into a double-precision floating-\r
+point value, returning the result. After being shifted into the proper\r
+positions, the three fields `zSign', `zExp', and `zSig0' are simply added\r
+together to form the most significant 32 bits of the result. This means\r
+that any integer portion of `zSig0' will be added into the exponent. Since\r
+a properly normalized significand will have an integer portion equal to 1,\r
+the `zExp' input should be 1 less than the desired result exponent whenever\r
+`zSig0' and `zSig1' concatenated form a complete, normalized significand.\r
+-------------------------------------------------------------------------------\r
+*/\r
+INLINE float64\r
+ packFloat64( flag zSign, int16 zExp, bits32 zSig0, bits32 zSig1 )\r
+{\r
+\r
+ return FLOAT64_MANGLE( ( ( (bits64) zSign )<<63 ) +\r
+ ( ( (bits64) zExp )<<52 ) +\r
+ ( ( (bits64) zSig0 )<<32 ) + zSig1 );\r
+\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Takes an abstract floating-point value having sign `zSign', exponent `zExp',\r
+and extended significand formed by the concatenation of `zSig0', `zSig1',\r
+and `zSig2', and returns the proper double-precision floating-point value\r
+corresponding to the abstract input. Ordinarily, the abstract value is\r
+simply rounded and packed into the double-precision format, with the inexact\r
+exception raised if the abstract input cannot be represented exactly.\r
+However, if the abstract value is too large, the overflow and inexact\r
+exceptions are raised and an infinity or maximal finite value is returned.\r
+If the abstract value is too small, the input value is rounded to a\r
+subnormal number, and the underflow and inexact exceptions are raised if the\r
+abstract input cannot be represented exactly as a subnormal double-precision\r
+floating-point number.\r
+ The input significand must be normalized or smaller. If the input\r
+significand is not normalized, `zExp' must be 0; in that case, the result\r
+returned is a subnormal number, and it must not require rounding. In the\r
+usual case that the input significand is normalized, `zExp' must be 1 less\r
+than the ``true'' floating-point exponent. The handling of underflow and\r
+overflow follows the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+static float64\r
+ roundAndPackFloat64(\r
+ flag zSign, int16 zExp, bits32 zSig0, bits32 zSig1, bits32 zSig2 )\r
+{\r
+ int8 roundingMode;\r
+ flag roundNearestEven, increment, isTiny;\r
+\r
+ roundingMode = float_rounding_mode;\r
+ roundNearestEven = ( roundingMode == float_round_nearest_even );\r
+ increment = ( (sbits32) zSig2 < 0 );\r
+ if ( ! roundNearestEven ) {\r
+ if ( roundingMode == float_round_to_zero ) {\r
+ increment = 0;\r
+ }\r
+ else {\r
+ if ( zSign ) {\r
+ increment = ( roundingMode == float_round_down ) && zSig2;\r
+ }\r
+ else {\r
+ increment = ( roundingMode == float_round_up ) && zSig2;\r
+ }\r
+ }\r
+ }\r
+ if ( 0x7FD <= (bits16) zExp ) {\r
+ if ( ( 0x7FD < zExp )\r
+ || ( ( zExp == 0x7FD )\r
+ && eq64( 0x001FFFFF, 0xFFFFFFFF, zSig0, zSig1 )\r
+ && increment\r
+ )\r
+ ) {\r
+ float_raise( float_flag_overflow | float_flag_inexact );\r
+ if ( ( roundingMode == float_round_to_zero )\r
+ || ( zSign && ( roundingMode == float_round_up ) )\r
+ || ( ! zSign && ( roundingMode == float_round_down ) )\r
+ ) {\r
+ return packFloat64( zSign, 0x7FE, 0x000FFFFF, 0xFFFFFFFF );\r
+ }\r
+ return packFloat64( zSign, 0x7FF, 0, 0 );\r
+ }\r
+ if ( zExp < 0 ) {\r
+ isTiny =\r
+ ( float_detect_tininess == float_tininess_before_rounding )\r
+ || ( zExp < -1 )\r
+ || ! increment\r
+ || lt64( zSig0, zSig1, 0x001FFFFF, 0xFFFFFFFF );\r
+ shift64ExtraRightJamming(\r
+ zSig0, zSig1, zSig2, - zExp, &zSig0, &zSig1, &zSig2 );\r
+ zExp = 0;\r
+ if ( isTiny && zSig2 ) float_raise( float_flag_underflow );\r
+ if ( roundNearestEven ) {\r
+ increment = ( (sbits32) zSig2 < 0 );\r
+ }\r
+ else {\r
+ if ( zSign ) {\r
+ increment = ( roundingMode == float_round_down ) && zSig2;\r
+ }\r
+ else {\r
+ increment = ( roundingMode == float_round_up ) && zSig2;\r
+ }\r
+ }\r
+ }\r
+ }\r
+ if ( zSig2 ) set_float_exception_inexact_flag();\r
+ if ( increment ) {\r
+ add64( zSig0, zSig1, 0, 1, &zSig0, &zSig1 );\r
+ zSig1 &= ~ ( ( zSig2 + zSig2 == 0 ) & roundNearestEven );\r
+ }\r
+ else {\r
+ if ( ( zSig0 | zSig1 ) == 0 ) zExp = 0;\r
+ }\r
+ return packFloat64( zSign, zExp, zSig0, zSig1 );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Takes an abstract floating-point value having sign `zSign', exponent `zExp',\r
+and significand formed by the concatenation of `zSig0' and `zSig1', and\r
+returns the proper double-precision floating-point value corresponding\r
+to the abstract input. This routine is just like `roundAndPackFloat64'\r
+except that the input significand has fewer bits and does not have to be\r
+normalized. In all cases, `zExp' must be 1 less than the ``true'' floating-\r
+point exponent.\r
+-------------------------------------------------------------------------------\r
+*/\r
+static float64\r
+ normalizeRoundAndPackFloat64(\r
+ flag zSign, int16 zExp, bits32 zSig0, bits32 zSig1 )\r
+{\r
+ int8 shiftCount;\r
+ bits32 zSig2;\r
+\r
+ if ( zSig0 == 0 ) {\r
+ zSig0 = zSig1;\r
+ zSig1 = 0;\r
+ zExp -= 32;\r
+ }\r
+ shiftCount = countLeadingZeros32( zSig0 ) - 11;\r
+ if ( 0 <= shiftCount ) {\r
+ zSig2 = 0;\r
+ shortShift64Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 );\r
+ }\r
+ else {\r
+ shift64ExtraRightJamming(\r
+ zSig0, zSig1, 0, - shiftCount, &zSig0, &zSig1, &zSig2 );\r
+ }\r
+ zExp -= shiftCount;\r
+ return roundAndPackFloat64( zSign, zExp, zSig0, zSig1, zSig2 );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of converting the 32-bit two's complement integer `a' to\r
+the single-precision floating-point format. The conversion is performed\r
+according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+float32 int32_to_float32( int32 a )\r
+{\r
+ flag zSign;\r
+\r
+ if ( a == 0 ) return 0;\r
+ if ( a == (sbits32) 0x80000000 ) return packFloat32( 1, 0x9E, 0 );\r
+ zSign = ( a < 0 );\r
+ return normalizeRoundAndPackFloat32(zSign, 0x9C, (uint32)(zSign ? - a : a));\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of converting the 32-bit two's complement integer `a' to\r
+the double-precision floating-point format. The conversion is performed\r
+according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+float64 int32_to_float64( int32 a )\r
+{\r
+ flag zSign;\r
+ bits32 absA;\r
+ int8 shiftCount;\r
+ bits32 zSig0, zSig1;\r
+\r
+ if ( a == 0 ) return packFloat64( 0, 0, 0, 0 );\r
+ zSign = ( a < 0 );\r
+ absA = zSign ? - a : a;\r
+ shiftCount = countLeadingZeros32( absA ) - 11;\r
+ if ( 0 <= shiftCount ) {\r
+ zSig0 = absA<<shiftCount;\r
+ zSig1 = 0;\r
+ }\r
+ else {\r
+ shift64Right( absA, 0, - shiftCount, &zSig0, &zSig1 );\r
+ }\r
+ return packFloat64( zSign, 0x412 - shiftCount, zSig0, zSig1 );\r
+\r
+}\r
+\r
+#ifndef SOFTFLOAT_FOR_GCC\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of converting the single-precision floating-point value\r
+`a' to the 32-bit two's complement integer format. The conversion is\r
+performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+Arithmetic---which means in particular that the conversion is rounded\r
+according to the current rounding mode. If `a' is a NaN, the largest\r
+positive integer is returned. Otherwise, if the conversion overflows, the\r
+largest integer with the same sign as `a' is returned.\r
+-------------------------------------------------------------------------------\r
+*/\r
+int32 float32_to_int32( float32 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp, shiftCount;\r
+ bits32 aSig, aSigExtra;\r
+ int32 z;\r
+ int8 roundingMode;\r
+\r
+ aSig = extractFloat32Frac( a );\r
+ aExp = extractFloat32Exp( a );\r
+ aSign = extractFloat32Sign( a );\r
+ shiftCount = aExp - 0x96;\r
+ if ( 0 <= shiftCount ) {\r
+ if ( 0x9E <= aExp ) {\r
+ if ( a != 0xCF000000 ) {\r
+ float_raise( float_flag_invalid );\r
+ if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) {\r
+ return 0x7FFFFFFF;\r
+ }\r
+ }\r
+ return (sbits32) 0x80000000;\r
+ }\r
+ z = ( aSig | 0x00800000 )<<shiftCount;\r
+ if ( aSign ) z = - z;\r
+ }\r
+ else {\r
+ if ( aExp < 0x7E ) {\r
+ aSigExtra = aExp | aSig;\r
+ z = 0;\r
+ }\r
+ else {\r
+ aSig |= 0x00800000;\r
+ aSigExtra = aSig<<( shiftCount & 31 );\r
+ z = aSig>>( - shiftCount );\r
+ }\r
+ if ( aSigExtra ) set_float_exception_inexact_flag();\r
+ roundingMode = float_rounding_mode;\r
+ if ( roundingMode == float_round_nearest_even ) {\r
+ if ( (sbits32) aSigExtra < 0 ) {\r
+ ++z;\r
+ if ( (bits32) ( aSigExtra<<1 ) == 0 ) z &= ~1;\r
+ }\r
+ if ( aSign ) z = - z;\r
+ }\r
+ else {\r
+ aSigExtra = ( aSigExtra != 0 );\r
+ if ( aSign ) {\r
+ z += ( roundingMode == float_round_down ) & aSigExtra;\r
+ z = - z;\r
+ }\r
+ else {\r
+ z += ( roundingMode == float_round_up ) & aSigExtra;\r
+ }\r
+ }\r
+ }\r
+ return z;\r
+\r
+}\r
+#endif\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of converting the single-precision floating-point value\r
+`a' to the 32-bit two's complement integer format. The conversion is\r
+performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+Arithmetic, except that the conversion is always rounded toward zero.\r
+If `a' is a NaN, the largest positive integer is returned. Otherwise, if\r
+the conversion overflows, the largest integer with the same sign as `a' is\r
+returned.\r
+-------------------------------------------------------------------------------\r
+*/\r
+int32 float32_to_int32_round_to_zero( float32 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp, shiftCount;\r
+ bits32 aSig;\r
+ int32 z;\r
+\r
+ aSig = extractFloat32Frac( a );\r
+ aExp = extractFloat32Exp( a );\r
+ aSign = extractFloat32Sign( a );\r
+ shiftCount = aExp - 0x9E;\r
+ if ( 0 <= shiftCount ) {\r
+ if ( a != 0xCF000000 ) {\r
+ float_raise( float_flag_invalid );\r
+ if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) return 0x7FFFFFFF;\r
+ }\r
+ return (sbits32) 0x80000000;\r
+ }\r
+ else if ( aExp <= 0x7E ) {\r
+ if ( aExp | aSig ) set_float_exception_inexact_flag();\r
+ return 0;\r
+ }\r
+ aSig = ( aSig | 0x00800000 )<<8;\r
+ z = aSig>>( - shiftCount );\r
+ if ( (bits32) ( aSig<<( shiftCount & 31 ) ) ) {\r
+ set_float_exception_inexact_flag();\r
+ }\r
+ if ( aSign ) z = - z;\r
+ return z;\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of converting the single-precision floating-point value\r
+`a' to the double-precision floating-point format. The conversion is\r
+performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+float64 float32_to_float64( float32 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp;\r
+ bits32 aSig, zSig0, zSig1;\r
+\r
+ aSig = extractFloat32Frac( a );\r
+ aExp = extractFloat32Exp( a );\r
+ aSign = extractFloat32Sign( a );\r
+ if ( aExp == 0xFF ) {\r
+ if ( aSig ) return commonNaNToFloat64( float32ToCommonNaN( a ) );\r
+ return packFloat64( aSign, 0x7FF, 0, 0 );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( aSig == 0 ) return packFloat64( aSign, 0, 0, 0 );\r
+ normalizeFloat32Subnormal( aSig, &aExp, &aSig );\r
+ --aExp;\r
+ }\r
+ shift64Right( aSig, 0, 3, &zSig0, &zSig1 );\r
+ return packFloat64( aSign, aExp + 0x380, zSig0, zSig1 );\r
+\r
+}\r
+\r
+#ifndef SOFTFLOAT_FOR_GCC\r
+/*\r
+-------------------------------------------------------------------------------\r
+Rounds the single-precision floating-point value `a' to an integer,\r
+and returns the result as a single-precision floating-point value. The\r
+operation is performed according to the IEC/IEEE Standard for Binary\r
+Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+float32 float32_round_to_int( float32 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp;\r
+ bits32 lastBitMask, roundBitsMask;\r
+ int8 roundingMode;\r
+ float32 z;\r
+\r
+ aExp = extractFloat32Exp( a );\r
+ if ( 0x96 <= aExp ) {\r
+ if ( ( aExp == 0xFF ) && extractFloat32Frac( a ) ) {\r
+ return propagateFloat32NaN( a, a );\r
+ }\r
+ return a;\r
+ }\r
+ if ( aExp <= 0x7E ) {\r
+ if ( (bits32) ( a<<1 ) == 0 ) return a;\r
+ set_float_exception_inexact_flag();\r
+ aSign = extractFloat32Sign( a );\r
+ switch ( float_rounding_mode ) {\r
+ case float_round_nearest_even:\r
+ if ( ( aExp == 0x7E ) && extractFloat32Frac( a ) ) {\r
+ return packFloat32( aSign, 0x7F, 0 );\r
+ }\r
+ break;\r
+ case float_round_to_zero:\r
+ break;\r
+ case float_round_down:\r
+ return aSign ? 0xBF800000 : 0;\r
+ case float_round_up:\r
+ return aSign ? 0x80000000 : 0x3F800000;\r
+ }\r
+ return packFloat32( aSign, 0, 0 );\r
+ }\r
+ lastBitMask = 1;\r
+ lastBitMask <<= 0x96 - aExp;\r
+ roundBitsMask = lastBitMask - 1;\r
+ z = a;\r
+ roundingMode = float_rounding_mode;\r
+ if ( roundingMode == float_round_nearest_even ) {\r
+ z += lastBitMask>>1;\r
+ if ( ( z & roundBitsMask ) == 0 ) z &= ~ lastBitMask;\r
+ }\r
+ else if ( roundingMode != float_round_to_zero ) {\r
+ if ( extractFloat32Sign( z ) ^ ( roundingMode == float_round_up ) ) {\r
+ z += roundBitsMask;\r
+ }\r
+ }\r
+ z &= ~ roundBitsMask;\r
+ if ( z != a ) set_float_exception_inexact_flag();\r
+ return z;\r
+\r
+}\r
+#endif\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of adding the absolute values of the single-precision\r
+floating-point values `a' and `b'. If `zSign' is 1, the sum is negated\r
+before being returned. `zSign' is ignored if the result is a NaN.\r
+The addition is performed according to the IEC/IEEE Standard for Binary\r
+Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+static float32 addFloat32Sigs( float32 a, float32 b, flag zSign )\r
+{\r
+ int16 aExp, bExp, zExp;\r
+ bits32 aSig, bSig, zSig;\r
+ int16 expDiff;\r
+\r
+ aSig = extractFloat32Frac( a );\r
+ aExp = extractFloat32Exp( a );\r
+ bSig = extractFloat32Frac( b );\r
+ bExp = extractFloat32Exp( b );\r
+ expDiff = aExp - bExp;\r
+ aSig <<= 6;\r
+ bSig <<= 6;\r
+ if ( 0 < expDiff ) {\r
+ if ( aExp == 0xFF ) {\r
+ if ( aSig ) return propagateFloat32NaN( a, b );\r
+ return a;\r
+ }\r
+ if ( bExp == 0 ) {\r
+ --expDiff;\r
+ }\r
+ else {\r
+ bSig |= 0x20000000;\r
+ }\r
+ shift32RightJamming( bSig, expDiff, &bSig );\r
+ zExp = aExp;\r
+ }\r
+ else if ( expDiff < 0 ) {\r
+ if ( bExp == 0xFF ) {\r
+ if ( bSig ) return propagateFloat32NaN( a, b );\r
+ return packFloat32( zSign, 0xFF, 0 );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ ++expDiff;\r
+ }\r
+ else {\r
+ aSig |= 0x20000000;\r
+ }\r
+ shift32RightJamming( aSig, - expDiff, &aSig );\r
+ zExp = bExp;\r
+ }\r
+ else {\r
+ if ( aExp == 0xFF ) {\r
+ if ( aSig | bSig ) return propagateFloat32NaN( a, b );\r
+ return a;\r
+ }\r
+ if ( aExp == 0 ) return packFloat32( zSign, 0, ( aSig + bSig )>>6 );\r
+ zSig = 0x40000000 + aSig + bSig;\r
+ zExp = aExp;\r
+ goto roundAndPack;\r
+ }\r
+ aSig |= 0x20000000;\r
+ zSig = ( aSig + bSig )<<1;\r
+ --zExp;\r
+ if ( (sbits32) zSig < 0 ) {\r
+ zSig = aSig + bSig;\r
+ ++zExp;\r
+ }\r
+ roundAndPack:\r
+ return roundAndPackFloat32( zSign, zExp, zSig );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of subtracting the absolute values of the single-\r
+precision floating-point values `a' and `b'. If `zSign' is 1, the\r
+difference is negated before being returned. `zSign' is ignored if the\r
+result is a NaN. The subtraction is performed according to the IEC/IEEE\r
+Standard for Binary Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+static float32 subFloat32Sigs( float32 a, float32 b, flag zSign )\r
+{\r
+ int16 aExp, bExp, zExp;\r
+ bits32 aSig, bSig, zSig;\r
+ int16 expDiff;\r
+\r
+ aSig = extractFloat32Frac( a );\r
+ aExp = extractFloat32Exp( a );\r
+ bSig = extractFloat32Frac( b );\r
+ bExp = extractFloat32Exp( b );\r
+ expDiff = aExp - bExp;\r
+ aSig <<= 7;\r
+ bSig <<= 7;\r
+ if ( 0 < expDiff ) goto aExpBigger;\r
+ if ( expDiff < 0 ) goto bExpBigger;\r
+ if ( aExp == 0xFF ) {\r
+ if ( aSig | bSig ) return propagateFloat32NaN( a, b );\r
+ float_raise( float_flag_invalid );\r
+ return float32_default_nan;\r
+ }\r
+ if ( aExp == 0 ) {\r
+ aExp = 1;\r
+ bExp = 1;\r
+ }\r
+ if ( bSig < aSig ) goto aBigger;\r
+ if ( aSig < bSig ) goto bBigger;\r
+ return packFloat32( float_rounding_mode == float_round_down, 0, 0 );\r
+ bExpBigger:\r
+ if ( bExp == 0xFF ) {\r
+ if ( bSig ) return propagateFloat32NaN( a, b );\r
+ return packFloat32( zSign ^ 1, 0xFF, 0 );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ ++expDiff;\r
+ }\r
+ else {\r
+ aSig |= 0x40000000;\r
+ }\r
+ shift32RightJamming( aSig, - expDiff, &aSig );\r
+ bSig |= 0x40000000;\r
+ bBigger:\r
+ zSig = bSig - aSig;\r
+ zExp = bExp;\r
+ zSign ^= 1;\r
+ goto normalizeRoundAndPack;\r
+ aExpBigger:\r
+ if ( aExp == 0xFF ) {\r
+ if ( aSig ) return propagateFloat32NaN( a, b );\r
+ return a;\r
+ }\r
+ if ( bExp == 0 ) {\r
+ --expDiff;\r
+ }\r
+ else {\r
+ bSig |= 0x40000000;\r
+ }\r
+ shift32RightJamming( bSig, expDiff, &bSig );\r
+ aSig |= 0x40000000;\r
+ aBigger:\r
+ zSig = aSig - bSig;\r
+ zExp = aExp;\r
+ normalizeRoundAndPack:\r
+ --zExp;\r
+ return normalizeRoundAndPackFloat32( zSign, zExp, zSig );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of adding the single-precision floating-point values `a'\r
+and `b'. The operation is performed according to the IEC/IEEE Standard for\r
+Binary Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+float32 float32_add( float32 a, float32 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ aSign = extractFloat32Sign( a );\r
+ bSign = extractFloat32Sign( b );\r
+ if ( aSign == bSign ) {\r
+ return addFloat32Sigs( a, b, aSign );\r
+ }\r
+ else {\r
+ return subFloat32Sigs( a, b, aSign );\r
+ }\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of subtracting the single-precision floating-point values\r
+`a' and `b'. The operation is performed according to the IEC/IEEE Standard\r
+for Binary Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+float32 float32_sub( float32 a, float32 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ aSign = extractFloat32Sign( a );\r
+ bSign = extractFloat32Sign( b );\r
+ if ( aSign == bSign ) {\r
+ return subFloat32Sigs( a, b, aSign );\r
+ }\r
+ else {\r
+ return addFloat32Sigs( a, b, aSign );\r
+ }\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of multiplying the single-precision floating-point values\r
+`a' and `b'. The operation is performed according to the IEC/IEEE Standard\r
+for Binary Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+float32 float32_mul( float32 a, float32 b )\r
+{\r
+ flag aSign, bSign, zSign;\r
+ int16 aExp, bExp, zExp;\r
+ bits32 aSig, bSig, zSig0, zSig1;\r
+\r
+ aSig = extractFloat32Frac( a );\r
+ aExp = extractFloat32Exp( a );\r
+ aSign = extractFloat32Sign( a );\r
+ bSig = extractFloat32Frac( b );\r
+ bExp = extractFloat32Exp( b );\r
+ bSign = extractFloat32Sign( b );\r
+ zSign = aSign ^ bSign;\r
+ if ( aExp == 0xFF ) {\r
+ if ( aSig || ( ( bExp == 0xFF ) && bSig ) ) {\r
+ return propagateFloat32NaN( a, b );\r
+ }\r
+ if ( ( bExp | bSig ) == 0 ) {\r
+ float_raise( float_flag_invalid );\r
+ return float32_default_nan;\r
+ }\r
+ return packFloat32( zSign, 0xFF, 0 );\r
+ }\r
+ if ( bExp == 0xFF ) {\r
+ if ( bSig ) return propagateFloat32NaN( a, b );\r
+ if ( ( aExp | aSig ) == 0 ) {\r
+ float_raise( float_flag_invalid );\r
+ return float32_default_nan;\r
+ }\r
+ return packFloat32( zSign, 0xFF, 0 );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( aSig == 0 ) return packFloat32( zSign, 0, 0 );\r
+ normalizeFloat32Subnormal( aSig, &aExp, &aSig );\r
+ }\r
+ if ( bExp == 0 ) {\r
+ if ( bSig == 0 ) return packFloat32( zSign, 0, 0 );\r
+ normalizeFloat32Subnormal( bSig, &bExp, &bSig );\r
+ }\r
+ zExp = aExp + bExp - 0x7F;\r
+ aSig = ( aSig | 0x00800000 )<<7;\r
+ bSig = ( bSig | 0x00800000 )<<8;\r
+ mul32To64( aSig, bSig, &zSig0, &zSig1 );\r
+ zSig0 |= ( zSig1 != 0 );\r
+ if ( 0 <= (sbits32) ( zSig0<<1 ) ) {\r
+ zSig0 <<= 1;\r
+ --zExp;\r
+ }\r
+ return roundAndPackFloat32( zSign, zExp, zSig0 );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of dividing the single-precision floating-point value `a'\r
+by the corresponding value `b'. The operation is performed according to the\r
+IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+float32 float32_div( float32 a, float32 b )\r
+{\r
+ flag aSign, bSign, zSign;\r
+ int16 aExp, bExp, zExp;\r
+ bits32 aSig, bSig, zSig, rem0, rem1, term0, term1;\r
+\r
+ aSig = extractFloat32Frac( a );\r
+ aExp = extractFloat32Exp( a );\r
+ aSign = extractFloat32Sign( a );\r
+ bSig = extractFloat32Frac( b );\r
+ bExp = extractFloat32Exp( b );\r
+ bSign = extractFloat32Sign( b );\r
+ zSign = aSign ^ bSign;\r
+ if ( aExp == 0xFF ) {\r
+ if ( aSig ) return propagateFloat32NaN( a, b );\r
+ if ( bExp == 0xFF ) {\r
+ if ( bSig ) return propagateFloat32NaN( a, b );\r
+ float_raise( float_flag_invalid );\r
+ return float32_default_nan;\r
+ }\r
+ return packFloat32( zSign, 0xFF, 0 );\r
+ }\r
+ if ( bExp == 0xFF ) {\r
+ if ( bSig ) return propagateFloat32NaN( a, b );\r
+ return packFloat32( zSign, 0, 0 );\r
+ }\r
+ if ( bExp == 0 ) {\r
+ if ( bSig == 0 ) {\r
+ if ( ( aExp | aSig ) == 0 ) {\r
+ float_raise( float_flag_invalid );\r
+ return float32_default_nan;\r
+ }\r
+ float_raise( float_flag_divbyzero );\r
+ return packFloat32( zSign, 0xFF, 0 );\r
+ }\r
+ normalizeFloat32Subnormal( bSig, &bExp, &bSig );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( aSig == 0 ) return packFloat32( zSign, 0, 0 );\r
+ normalizeFloat32Subnormal( aSig, &aExp, &aSig );\r
+ }\r
+ zExp = aExp - bExp + 0x7D;\r
+ aSig = ( aSig | 0x00800000 )<<7;\r
+ bSig = ( bSig | 0x00800000 )<<8;\r
+ if ( bSig <= ( aSig + aSig ) ) {\r
+ aSig >>= 1;\r
+ ++zExp;\r
+ }\r
+ zSig = estimateDiv64To32( aSig, 0, bSig );\r
+ if ( ( zSig & 0x3F ) <= 2 ) {\r
+ mul32To64( bSig, zSig, &term0, &term1 );\r
+ sub64( aSig, 0, term0, term1, &rem0, &rem1 );\r
+ while ( (sbits32) rem0 < 0 ) {\r
+ --zSig;\r
+ add64( rem0, rem1, 0, bSig, &rem0, &rem1 );\r
+ }\r
+ zSig |= ( rem1 != 0 );\r
+ }\r
+ return roundAndPackFloat32( zSign, zExp, zSig );\r
+\r
+}\r
+\r
+#ifndef SOFTFLOAT_FOR_GCC\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the remainder of the single-precision floating-point value `a'\r
+with respect to the corresponding value `b'. The operation is performed\r
+according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+float32 float32_rem( float32 a, float32 b )\r
+{\r
+ flag aSign, bSign, zSign;\r
+ int16 aExp, bExp, expDiff;\r
+ bits32 aSig, bSig, q, allZero, alternateASig;\r
+ sbits32 sigMean;\r
+\r
+ aSig = extractFloat32Frac( a );\r
+ aExp = extractFloat32Exp( a );\r
+ aSign = extractFloat32Sign( a );\r
+ bSig = extractFloat32Frac( b );\r
+ bExp = extractFloat32Exp( b );\r
+ bSign = extractFloat32Sign( b );\r
+ if ( aExp == 0xFF ) {\r
+ if ( aSig || ( ( bExp == 0xFF ) && bSig ) ) {\r
+ return propagateFloat32NaN( a, b );\r
+ }\r
+ float_raise( float_flag_invalid );\r
+ return float32_default_nan;\r
+ }\r
+ if ( bExp == 0xFF ) {\r
+ if ( bSig ) return propagateFloat32NaN( a, b );\r
+ return a;\r
+ }\r
+ if ( bExp == 0 ) {\r
+ if ( bSig == 0 ) {\r
+ float_raise( float_flag_invalid );\r
+ return float32_default_nan;\r
+ }\r
+ normalizeFloat32Subnormal( bSig, &bExp, &bSig );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( aSig == 0 ) return a;\r
+ normalizeFloat32Subnormal( aSig, &aExp, &aSig );\r
+ }\r
+ expDiff = aExp - bExp;\r
+ aSig = ( aSig | 0x00800000 )<<8;\r
+ bSig = ( bSig | 0x00800000 )<<8;\r
+ if ( expDiff < 0 ) {\r
+ if ( expDiff < -1 ) return a;\r
+ aSig >>= 1;\r
+ }\r
+ q = ( bSig <= aSig );\r
+ if ( q ) aSig -= bSig;\r
+ expDiff -= 32;\r
+ while ( 0 < expDiff ) {\r
+ q = estimateDiv64To32( aSig, 0, bSig );\r
+ q = ( 2 < q ) ? q - 2 : 0;\r
+ aSig = - ( ( bSig>>2 ) * q );\r
+ expDiff -= 30;\r
+ }\r
+ expDiff += 32;\r
+ if ( 0 < expDiff ) {\r
+ q = estimateDiv64To32( aSig, 0, bSig );\r
+ q = ( 2 < q ) ? q - 2 : 0;\r
+ q >>= 32 - expDiff;\r
+ bSig >>= 2;\r
+ aSig = ( ( aSig>>1 )<<( expDiff - 1 ) ) - bSig * q;\r
+ }\r
+ else {\r
+ aSig >>= 2;\r
+ bSig >>= 2;\r
+ }\r
+ do {\r
+ alternateASig = aSig;\r
+ ++q;\r
+ aSig -= bSig;\r
+ } while ( 0 <= (sbits32) aSig );\r
+ sigMean = aSig + alternateASig;\r
+ if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) {\r
+ aSig = alternateASig;\r
+ }\r
+ zSign = ( (sbits32) aSig < 0 );\r
+ if ( zSign ) aSig = - aSig;\r
+ return normalizeRoundAndPackFloat32( aSign ^ zSign, bExp, aSig );\r
+\r
+}\r
+#endif\r
+\r
+#ifndef SOFTFLOAT_FOR_GCC\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the square root of the single-precision floating-point value `a'.\r
+The operation is performed according to the IEC/IEEE Standard for Binary\r
+Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+float32 float32_sqrt( float32 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp, zExp;\r
+ bits32 aSig, zSig, rem0, rem1, term0, term1;\r
+\r
+ aSig = extractFloat32Frac( a );\r
+ aExp = extractFloat32Exp( a );\r
+ aSign = extractFloat32Sign( a );\r
+ if ( aExp == 0xFF ) {\r
+ if ( aSig ) return propagateFloat32NaN( a, 0 );\r
+ if ( ! aSign ) return a;\r
+ float_raise( float_flag_invalid );\r
+ return float32_default_nan;\r
+ }\r
+ if ( aSign ) {\r
+ if ( ( aExp | aSig ) == 0 ) return a;\r
+ float_raise( float_flag_invalid );\r
+ return float32_default_nan;\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( aSig == 0 ) return 0;\r
+ normalizeFloat32Subnormal( aSig, &aExp, &aSig );\r
+ }\r
+ zExp = ( ( aExp - 0x7F )>>1 ) + 0x7E;\r
+ aSig = ( aSig | 0x00800000 )<<8;\r
+ zSig = estimateSqrt32( aExp, aSig ) + 2;\r
+ if ( ( zSig & 0x7F ) <= 5 ) {\r
+ if ( zSig < 2 ) {\r
+ zSig = 0x7FFFFFFF;\r
+ goto roundAndPack;\r
+ }\r
+ else {\r
+ aSig >>= aExp & 1;\r
+ mul32To64( zSig, zSig, &term0, &term1 );\r
+ sub64( aSig, 0, term0, term1, &rem0, &rem1 );\r
+ while ( (sbits32) rem0 < 0 ) {\r
+ --zSig;\r
+ shortShift64Left( 0, zSig, 1, &term0, &term1 );\r
+ term1 |= 1;\r
+ add64( rem0, rem1, term0, term1, &rem0, &rem1 );\r
+ }\r
+ zSig |= ( ( rem0 | rem1 ) != 0 );\r
+ }\r
+ }\r
+ shift32RightJamming( zSig, 1, &zSig );\r
+ roundAndPack:\r
+ return roundAndPackFloat32( 0, zExp, zSig );\r
+\r
+}\r
+#endif\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns 1 if the single-precision floating-point value `a' is equal to\r
+the corresponding value `b', and 0 otherwise. The comparison is performed\r
+according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+flag float32_eq( float32 a, float32 b )\r
+{\r
+\r
+ if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )\r
+ || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )\r
+ ) {\r
+ if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) {\r
+ float_raise( float_flag_invalid );\r
+ }\r
+ return 0;\r
+ }\r
+ return ( a == b ) || ( (bits32) ( ( a | b )<<1 ) == 0 );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns 1 if the single-precision floating-point value `a' is less than\r
+or equal to the corresponding value `b', and 0 otherwise. The comparison\r
+is performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+flag float32_le( float32 a, float32 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )\r
+ || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )\r
+ ) {\r
+ float_raise( float_flag_invalid );\r
+ return 0;\r
+ }\r
+ aSign = extractFloat32Sign( a );\r
+ bSign = extractFloat32Sign( b );\r
+ if ( aSign != bSign ) return aSign || ( (bits32) ( ( a | b )<<1 ) == 0 );\r
+ return ( a == b ) || ( aSign ^ ( a < b ) );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns 1 if the single-precision floating-point value `a' is less than\r
+the corresponding value `b', and 0 otherwise. The comparison is performed\r
+according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+flag float32_lt( float32 a, float32 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )\r
+ || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )\r
+ ) {\r
+ float_raise( float_flag_invalid );\r
+ return 0;\r
+ }\r
+ aSign = extractFloat32Sign( a );\r
+ bSign = extractFloat32Sign( b );\r
+ if ( aSign != bSign ) return aSign && ( (bits32) ( ( a | b )<<1 ) != 0 );\r
+ return ( a != b ) && ( aSign ^ ( a < b ) );\r
+\r
+}\r
+\r
+#ifndef SOFTFLOAT_FOR_GCC /* Not needed */\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns 1 if the single-precision floating-point value `a' is equal to\r
+the corresponding value `b', and 0 otherwise. The invalid exception is\r
+raised if either operand is a NaN. Otherwise, the comparison is performed\r
+according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+flag float32_eq_signaling( float32 a, float32 b )\r
+{\r
+\r
+ if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )\r
+ || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )\r
+ ) {\r
+ float_raise( float_flag_invalid );\r
+ return 0;\r
+ }\r
+ return ( a == b ) || ( (bits32) ( ( a | b )<<1 ) == 0 );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns 1 if the single-precision floating-point value `a' is less than or\r
+equal to the corresponding value `b', and 0 otherwise. Quiet NaNs do not\r
+cause an exception. Otherwise, the comparison is performed according to the\r
+IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+flag float32_le_quiet( float32 a, float32 b )\r
+{\r
+ flag aSign, bSign;\r
+ int16 aExp, bExp;\r
+\r
+ if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )\r
+ || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )\r
+ ) {\r
+ if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) {\r
+ float_raise( float_flag_invalid );\r
+ }\r
+ return 0;\r
+ }\r
+ aSign = extractFloat32Sign( a );\r
+ bSign = extractFloat32Sign( b );\r
+ if ( aSign != bSign ) return aSign || ( (bits32) ( ( a | b )<<1 ) == 0 );\r
+ return ( a == b ) || ( aSign ^ ( a < b ) );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns 1 if the single-precision floating-point value `a' is less than\r
+the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an\r
+exception. Otherwise, the comparison is performed according to the IEC/IEEE\r
+Standard for Binary Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+flag float32_lt_quiet( float32 a, float32 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )\r
+ || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )\r
+ ) {\r
+ if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) {\r
+ float_raise( float_flag_invalid );\r
+ }\r
+ return 0;\r
+ }\r
+ aSign = extractFloat32Sign( a );\r
+ bSign = extractFloat32Sign( b );\r
+ if ( aSign != bSign ) return aSign && ( (bits32) ( ( a | b )<<1 ) != 0 );\r
+ return ( a != b ) && ( aSign ^ ( a < b ) );\r
+\r
+}\r
+#endif /* !SOFTFLOAT_FOR_GCC */\r
+\r
+#ifndef SOFTFLOAT_FOR_GCC /* Not needed */\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of converting the double-precision floating-point value\r
+`a' to the 32-bit two's complement integer format. The conversion is\r
+performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+Arithmetic---which means in particular that the conversion is rounded\r
+according to the current rounding mode. If `a' is a NaN, the largest\r
+positive integer is returned. Otherwise, if the conversion overflows, the\r
+largest integer with the same sign as `a' is returned.\r
+-------------------------------------------------------------------------------\r
+*/\r
+int32 float64_to_int32( float64 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp, shiftCount;\r
+ bits32 aSig0, aSig1, absZ, aSigExtra;\r
+ int32 z;\r
+ int8 roundingMode;\r
+\r
+ aSig1 = extractFloat64Frac1( a );\r
+ aSig0 = extractFloat64Frac0( a );\r
+ aExp = extractFloat64Exp( a );\r
+ aSign = extractFloat64Sign( a );\r
+ shiftCount = aExp - 0x413;\r
+ if ( 0 <= shiftCount ) {\r
+ if ( 0x41E < aExp ) {\r
+ if ( ( aExp == 0x7FF ) && ( aSig0 | aSig1 ) ) aSign = 0;\r
+ goto invalid;\r
+ }\r
+ shortShift64Left(\r
+ aSig0 | 0x00100000, aSig1, shiftCount, &absZ, &aSigExtra );\r
+ if ( 0x80000000 < absZ ) goto invalid;\r
+ }\r
+ else {\r
+ aSig1 = ( aSig1 != 0 );\r
+ if ( aExp < 0x3FE ) {\r
+ aSigExtra = aExp | aSig0 | aSig1;\r
+ absZ = 0;\r
+ }\r
+ else {\r
+ aSig0 |= 0x00100000;\r
+ aSigExtra = ( aSig0<<( shiftCount & 31 ) ) | aSig1;\r
+ absZ = aSig0>>( - shiftCount );\r
+ }\r
+ }\r
+ roundingMode = float_rounding_mode;\r
+ if ( roundingMode == float_round_nearest_even ) {\r
+ if ( (sbits32) aSigExtra < 0 ) {\r
+ ++absZ;\r
+ if ( (bits32) ( aSigExtra<<1 ) == 0 ) absZ &= ~1;\r
+ }\r
+ z = aSign ? - absZ : absZ;\r
+ }\r
+ else {\r
+ aSigExtra = ( aSigExtra != 0 );\r
+ if ( aSign ) {\r
+ z = - ( absZ\r
+ + ( ( roundingMode == float_round_down ) & aSigExtra ) );\r
+ }\r
+ else {\r
+ z = absZ + ( ( roundingMode == float_round_up ) & aSigExtra );\r
+ }\r
+ }\r
+ if ( ( aSign ^ ( z < 0 ) ) && z ) {\r
+ invalid:\r
+ float_raise( float_flag_invalid );\r
+ return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;\r
+ }\r
+ if ( aSigExtra ) set_float_exception_inexact_flag();\r
+ return z;\r
+\r
+}\r
+#endif /* !SOFTFLOAT_FOR_GCC */\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of converting the double-precision floating-point value\r
+`a' to the 32-bit two's complement integer format. The conversion is\r
+performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+Arithmetic, except that the conversion is always rounded toward zero.\r
+If `a' is a NaN, the largest positive integer is returned. Otherwise, if\r
+the conversion overflows, the largest integer with the same sign as `a' is\r
+returned.\r
+-------------------------------------------------------------------------------\r
+*/\r
+int32 float64_to_int32_round_to_zero( float64 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp, shiftCount;\r
+ bits32 aSig0, aSig1, absZ, aSigExtra;\r
+ int32 z;\r
+\r
+ aSig1 = extractFloat64Frac1( a );\r
+ aSig0 = extractFloat64Frac0( a );\r
+ aExp = extractFloat64Exp( a );\r
+ aSign = extractFloat64Sign( a );\r
+ shiftCount = aExp - 0x413;\r
+ if ( 0 <= shiftCount ) {\r
+ if ( 0x41E < aExp ) {\r
+ if ( ( aExp == 0x7FF ) && ( aSig0 | aSig1 ) ) aSign = 0;\r
+ goto invalid;\r
+ }\r
+ shortShift64Left(\r
+ aSig0 | 0x00100000, aSig1, shiftCount, &absZ, &aSigExtra );\r
+ }\r
+ else {\r
+ if ( aExp < 0x3FF ) {\r
+ if ( aExp | aSig0 | aSig1 ) {\r
+ set_float_exception_inexact_flag();\r
+ }\r
+ return 0;\r
+ }\r
+ aSig0 |= 0x00100000;\r
+ aSigExtra = ( aSig0<<( shiftCount & 31 ) ) | aSig1;\r
+ absZ = aSig0>>( - shiftCount );\r
+ }\r
+ z = aSign ? - absZ : absZ;\r
+ if ( ( aSign ^ ( z < 0 ) ) && z ) {\r
+ invalid:\r
+ float_raise( float_flag_invalid );\r
+ return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;\r
+ }\r
+ if ( aSigExtra ) set_float_exception_inexact_flag();\r
+ return z;\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of converting the double-precision floating-point value\r
+`a' to the single-precision floating-point format. The conversion is\r
+performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+float32 float64_to_float32( float64 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp;\r
+ bits32 aSig0, aSig1, zSig;\r
+ bits32 allZero;\r
+\r
+ aSig1 = extractFloat64Frac1( a );\r
+ aSig0 = extractFloat64Frac0( a );\r
+ aExp = extractFloat64Exp( a );\r
+ aSign = extractFloat64Sign( a );\r
+ if ( aExp == 0x7FF ) {\r
+ if ( aSig0 | aSig1 ) {\r
+ return commonNaNToFloat32( float64ToCommonNaN( a ) );\r
+ }\r
+ return packFloat32( aSign, 0xFF, 0 );\r
+ }\r
+ shift64RightJamming( aSig0, aSig1, 22, &allZero, &zSig );\r
+ if ( aExp ) zSig |= 0x40000000;\r
+ return roundAndPackFloat32( aSign, aExp - 0x381, zSig );\r
+\r
+}\r
+\r
+#ifndef SOFTFLOAT_FOR_GCC\r
+/*\r
+-------------------------------------------------------------------------------\r
+Rounds the double-precision floating-point value `a' to an integer,\r
+and returns the result as a double-precision floating-point value. The\r
+operation is performed according to the IEC/IEEE Standard for Binary\r
+Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+float64 float64_round_to_int( float64 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp;\r
+ bits32 lastBitMask, roundBitsMask;\r
+ int8 roundingMode;\r
+ float64 z;\r
+\r
+ aExp = extractFloat64Exp( a );\r
+ if ( 0x413 <= aExp ) {\r
+ if ( 0x433 <= aExp ) {\r
+ if ( ( aExp == 0x7FF )\r
+ && ( extractFloat64Frac0( a ) | extractFloat64Frac1( a ) ) ) {\r
+ return propagateFloat64NaN( a, a );\r
+ }\r
+ return a;\r
+ }\r
+ lastBitMask = 1;\r
+ lastBitMask = ( lastBitMask<<( 0x432 - aExp ) )<<1;\r
+ roundBitsMask = lastBitMask - 1;\r
+ z = a;\r
+ roundingMode = float_rounding_mode;\r
+ if ( roundingMode == float_round_nearest_even ) {\r
+ if ( lastBitMask ) {\r
+ add64( z.high, z.low, 0, lastBitMask>>1, &z.high, &z.low );\r
+ if ( ( z.low & roundBitsMask ) == 0 ) z.low &= ~ lastBitMask;\r
+ }\r
+ else {\r
+ if ( (sbits32) z.low < 0 ) {\r
+ ++z.high;\r
+ if ( (bits32) ( z.low<<1 ) == 0 ) z.high &= ~1;\r
+ }\r
+ }\r
+ }\r
+ else if ( roundingMode != float_round_to_zero ) {\r
+ if ( extractFloat64Sign( z )\r
+ ^ ( roundingMode == float_round_up ) ) {\r
+ add64( z.high, z.low, 0, roundBitsMask, &z.high, &z.low );\r
+ }\r
+ }\r
+ z.low &= ~ roundBitsMask;\r
+ }\r
+ else {\r
+ if ( aExp <= 0x3FE ) {\r
+ if ( ( ( (bits32) ( a.high<<1 ) ) | a.low ) == 0 ) return a;\r
+ set_float_exception_inexact_flag();\r
+ aSign = extractFloat64Sign( a );\r
+ switch ( float_rounding_mode ) {\r
+ case float_round_nearest_even:\r
+ if ( ( aExp == 0x3FE )\r
+ && ( extractFloat64Frac0( a ) | extractFloat64Frac1( a ) )\r
+ ) {\r
+ return packFloat64( aSign, 0x3FF, 0, 0 );\r
+ }\r
+ break;\r
+ case float_round_down:\r
+ return\r
+ aSign ? packFloat64( 1, 0x3FF, 0, 0 )\r
+ : packFloat64( 0, 0, 0, 0 );\r
+ case float_round_up:\r
+ return\r
+ aSign ? packFloat64( 1, 0, 0, 0 )\r
+ : packFloat64( 0, 0x3FF, 0, 0 );\r
+ }\r
+ return packFloat64( aSign, 0, 0, 0 );\r
+ }\r
+ lastBitMask = 1;\r
+ lastBitMask <<= 0x413 - aExp;\r
+ roundBitsMask = lastBitMask - 1;\r
+ z.low = 0;\r
+ z.high = a.high;\r
+ roundingMode = float_rounding_mode;\r
+ if ( roundingMode == float_round_nearest_even ) {\r
+ z.high += lastBitMask>>1;\r
+ if ( ( ( z.high & roundBitsMask ) | a.low ) == 0 ) {\r
+ z.high &= ~ lastBitMask;\r
+ }\r
+ }\r
+ else if ( roundingMode != float_round_to_zero ) {\r
+ if ( extractFloat64Sign( z )\r
+ ^ ( roundingMode == float_round_up ) ) {\r
+ z.high |= ( a.low != 0 );\r
+ z.high += roundBitsMask;\r
+ }\r
+ }\r
+ z.high &= ~ roundBitsMask;\r
+ }\r
+ if ( ( z.low != a.low ) || ( z.high != a.high ) ) {\r
+ set_float_exception_inexact_flag();\r
+ }\r
+ return z;\r
+\r
+}\r
+#endif\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of adding the absolute values of the double-precision\r
+floating-point values `a' and `b'. If `zSign' is 1, the sum is negated\r
+before being returned. `zSign' is ignored if the result is a NaN.\r
+The addition is performed according to the IEC/IEEE Standard for Binary\r
+Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+static float64 addFloat64Sigs( float64 a, float64 b, flag zSign )\r
+{\r
+ int16 aExp, bExp, zExp;\r
+ bits32 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;\r
+ int16 expDiff;\r
+\r
+ aSig1 = extractFloat64Frac1( a );\r
+ aSig0 = extractFloat64Frac0( a );\r
+ aExp = extractFloat64Exp( a );\r
+ bSig1 = extractFloat64Frac1( b );\r
+ bSig0 = extractFloat64Frac0( b );\r
+ bExp = extractFloat64Exp( b );\r
+ expDiff = aExp - bExp;\r
+ if ( 0 < expDiff ) {\r
+ if ( aExp == 0x7FF ) {\r
+ if ( aSig0 | aSig1 ) return propagateFloat64NaN( a, b );\r
+ return a;\r
+ }\r
+ if ( bExp == 0 ) {\r
+ --expDiff;\r
+ }\r
+ else {\r
+ bSig0 |= 0x00100000;\r
+ }\r
+ shift64ExtraRightJamming(\r
+ bSig0, bSig1, 0, expDiff, &bSig0, &bSig1, &zSig2 );\r
+ zExp = aExp;\r
+ }\r
+ else if ( expDiff < 0 ) {\r
+ if ( bExp == 0x7FF ) {\r
+ if ( bSig0 | bSig1 ) return propagateFloat64NaN( a, b );\r
+ return packFloat64( zSign, 0x7FF, 0, 0 );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ ++expDiff;\r
+ }\r
+ else {\r
+ aSig0 |= 0x00100000;\r
+ }\r
+ shift64ExtraRightJamming(\r
+ aSig0, aSig1, 0, - expDiff, &aSig0, &aSig1, &zSig2 );\r
+ zExp = bExp;\r
+ }\r
+ else {\r
+ if ( aExp == 0x7FF ) {\r
+ if ( aSig0 | aSig1 | bSig0 | bSig1 ) {\r
+ return propagateFloat64NaN( a, b );\r
+ }\r
+ return a;\r
+ }\r
+ add64( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );\r
+ if ( aExp == 0 ) return packFloat64( zSign, 0, zSig0, zSig1 );\r
+ zSig2 = 0;\r
+ zSig0 |= 0x00200000;\r
+ zExp = aExp;\r
+ goto shiftRight1;\r
+ }\r
+ aSig0 |= 0x00100000;\r
+ add64( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );\r
+ --zExp;\r
+ if ( zSig0 < 0x00200000 ) goto roundAndPack;\r
+ ++zExp;\r
+ shiftRight1:\r
+ shift64ExtraRightJamming( zSig0, zSig1, zSig2, 1, &zSig0, &zSig1, &zSig2 );\r
+ roundAndPack:\r
+ return roundAndPackFloat64( zSign, zExp, zSig0, zSig1, zSig2 );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of subtracting the absolute values of the double-\r
+precision floating-point values `a' and `b'. If `zSign' is 1, the\r
+difference is negated before being returned. `zSign' is ignored if the\r
+result is a NaN. The subtraction is performed according to the IEC/IEEE\r
+Standard for Binary Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+static float64 subFloat64Sigs( float64 a, float64 b, flag zSign )\r
+{\r
+ int16 aExp, bExp, zExp;\r
+ bits32 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1;\r
+ int16 expDiff;\r
+\r
+ aSig1 = extractFloat64Frac1( a );\r
+ aSig0 = extractFloat64Frac0( a );\r
+ aExp = extractFloat64Exp( a );\r
+ bSig1 = extractFloat64Frac1( b );\r
+ bSig0 = extractFloat64Frac0( b );\r
+ bExp = extractFloat64Exp( b );\r
+ expDiff = aExp - bExp;\r
+ shortShift64Left( aSig0, aSig1, 10, &aSig0, &aSig1 );\r
+ shortShift64Left( bSig0, bSig1, 10, &bSig0, &bSig1 );\r
+ if ( 0 < expDiff ) goto aExpBigger;\r
+ if ( expDiff < 0 ) goto bExpBigger;\r
+ if ( aExp == 0x7FF ) {\r
+ if ( aSig0 | aSig1 | bSig0 | bSig1 ) {\r
+ return propagateFloat64NaN( a, b );\r
+ }\r
+ float_raise( float_flag_invalid );\r
+ return float64_default_nan;\r
+ }\r
+ if ( aExp == 0 ) {\r
+ aExp = 1;\r
+ bExp = 1;\r
+ }\r
+ if ( bSig0 < aSig0 ) goto aBigger;\r
+ if ( aSig0 < bSig0 ) goto bBigger;\r
+ if ( bSig1 < aSig1 ) goto aBigger;\r
+ if ( aSig1 < bSig1 ) goto bBigger;\r
+ return packFloat64( float_rounding_mode == float_round_down, 0, 0, 0 );\r
+ bExpBigger:\r
+ if ( bExp == 0x7FF ) {\r
+ if ( bSig0 | bSig1 ) return propagateFloat64NaN( a, b );\r
+ return packFloat64( zSign ^ 1, 0x7FF, 0, 0 );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ ++expDiff;\r
+ }\r
+ else {\r
+ aSig0 |= 0x40000000;\r
+ }\r
+ shift64RightJamming( aSig0, aSig1, - expDiff, &aSig0, &aSig1 );\r
+ bSig0 |= 0x40000000;\r
+ bBigger:\r
+ sub64( bSig0, bSig1, aSig0, aSig1, &zSig0, &zSig1 );\r
+ zExp = bExp;\r
+ zSign ^= 1;\r
+ goto normalizeRoundAndPack;\r
+ aExpBigger:\r
+ if ( aExp == 0x7FF ) {\r
+ if ( aSig0 | aSig1 ) return propagateFloat64NaN( a, b );\r
+ return a;\r
+ }\r
+ if ( bExp == 0 ) {\r
+ --expDiff;\r
+ }\r
+ else {\r
+ bSig0 |= 0x40000000;\r
+ }\r
+ shift64RightJamming( bSig0, bSig1, expDiff, &bSig0, &bSig1 );\r
+ aSig0 |= 0x40000000;\r
+ aBigger:\r
+ sub64( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );\r
+ zExp = aExp;\r
+ normalizeRoundAndPack:\r
+ --zExp;\r
+ return normalizeRoundAndPackFloat64( zSign, zExp - 10, zSig0, zSig1 );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of adding the double-precision floating-point values `a'\r
+and `b'. The operation is performed according to the IEC/IEEE Standard for\r
+Binary Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+float64 float64_add( float64 a, float64 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ aSign = extractFloat64Sign( a );\r
+ bSign = extractFloat64Sign( b );\r
+ if ( aSign == bSign ) {\r
+ return addFloat64Sigs( a, b, aSign );\r
+ }\r
+ else {\r
+ return subFloat64Sigs( a, b, aSign );\r
+ }\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of subtracting the double-precision floating-point values\r
+`a' and `b'. The operation is performed according to the IEC/IEEE Standard\r
+for Binary Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+float64 float64_sub( float64 a, float64 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ aSign = extractFloat64Sign( a );\r
+ bSign = extractFloat64Sign( b );\r
+ if ( aSign == bSign ) {\r
+ return subFloat64Sigs( a, b, aSign );\r
+ }\r
+ else {\r
+ return addFloat64Sigs( a, b, aSign );\r
+ }\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of multiplying the double-precision floating-point values\r
+`a' and `b'. The operation is performed according to the IEC/IEEE Standard\r
+for Binary Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+float64 float64_mul( float64 a, float64 b )\r
+{\r
+ flag aSign, bSign, zSign;\r
+ int16 aExp, bExp, zExp;\r
+ bits32 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3;\r
+\r
+ aSig1 = extractFloat64Frac1( a );\r
+ aSig0 = extractFloat64Frac0( a );\r
+ aExp = extractFloat64Exp( a );\r
+ aSign = extractFloat64Sign( a );\r
+ bSig1 = extractFloat64Frac1( b );\r
+ bSig0 = extractFloat64Frac0( b );\r
+ bExp = extractFloat64Exp( b );\r
+ bSign = extractFloat64Sign( b );\r
+ zSign = aSign ^ bSign;\r
+ if ( aExp == 0x7FF ) {\r
+ if ( ( aSig0 | aSig1 )\r
+ || ( ( bExp == 0x7FF ) && ( bSig0 | bSig1 ) ) ) {\r
+ return propagateFloat64NaN( a, b );\r
+ }\r
+ if ( ( bExp | bSig0 | bSig1 ) == 0 ) goto invalid;\r
+ return packFloat64( zSign, 0x7FF, 0, 0 );\r
+ }\r
+ if ( bExp == 0x7FF ) {\r
+ if ( bSig0 | bSig1 ) return propagateFloat64NaN( a, b );\r
+ if ( ( aExp | aSig0 | aSig1 ) == 0 ) {\r
+ invalid:\r
+ float_raise( float_flag_invalid );\r
+ return float64_default_nan;\r
+ }\r
+ return packFloat64( zSign, 0x7FF, 0, 0 );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( ( aSig0 | aSig1 ) == 0 ) return packFloat64( zSign, 0, 0, 0 );\r
+ normalizeFloat64Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );\r
+ }\r
+ if ( bExp == 0 ) {\r
+ if ( ( bSig0 | bSig1 ) == 0 ) return packFloat64( zSign, 0, 0, 0 );\r
+ normalizeFloat64Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );\r
+ }\r
+ zExp = aExp + bExp - 0x400;\r
+ aSig0 |= 0x00100000;\r
+ shortShift64Left( bSig0, bSig1, 12, &bSig0, &bSig1 );\r
+ mul64To128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1, &zSig2, &zSig3 );\r
+ add64( zSig0, zSig1, aSig0, aSig1, &zSig0, &zSig1 );\r
+ zSig2 |= ( zSig3 != 0 );\r
+ if ( 0x00200000 <= zSig0 ) {\r
+ shift64ExtraRightJamming(\r
+ zSig0, zSig1, zSig2, 1, &zSig0, &zSig1, &zSig2 );\r
+ ++zExp;\r
+ }\r
+ return roundAndPackFloat64( zSign, zExp, zSig0, zSig1, zSig2 );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the result of dividing the double-precision floating-point value `a'\r
+by the corresponding value `b'. The operation is performed according to the\r
+IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+float64 float64_div( float64 a, float64 b )\r
+{\r
+ flag aSign, bSign, zSign;\r
+ int16 aExp, bExp, zExp;\r
+ bits32 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;\r
+ bits32 rem0, rem1, rem2, rem3, term0, term1, term2, term3;\r
+\r
+ aSig1 = extractFloat64Frac1( a );\r
+ aSig0 = extractFloat64Frac0( a );\r
+ aExp = extractFloat64Exp( a );\r
+ aSign = extractFloat64Sign( a );\r
+ bSig1 = extractFloat64Frac1( b );\r
+ bSig0 = extractFloat64Frac0( b );\r
+ bExp = extractFloat64Exp( b );\r
+ bSign = extractFloat64Sign( b );\r
+ zSign = aSign ^ bSign;\r
+ if ( aExp == 0x7FF ) {\r
+ if ( aSig0 | aSig1 ) return propagateFloat64NaN( a, b );\r
+ if ( bExp == 0x7FF ) {\r
+ if ( bSig0 | bSig1 ) return propagateFloat64NaN( a, b );\r
+ goto invalid;\r
+ }\r
+ return packFloat64( zSign, 0x7FF, 0, 0 );\r
+ }\r
+ if ( bExp == 0x7FF ) {\r
+ if ( bSig0 | bSig1 ) return propagateFloat64NaN( a, b );\r
+ return packFloat64( zSign, 0, 0, 0 );\r
+ }\r
+ if ( bExp == 0 ) {\r
+ if ( ( bSig0 | bSig1 ) == 0 ) {\r
+ if ( ( aExp | aSig0 | aSig1 ) == 0 ) {\r
+ invalid:\r
+ float_raise( float_flag_invalid );\r
+ return float64_default_nan;\r
+ }\r
+ float_raise( float_flag_divbyzero );\r
+ return packFloat64( zSign, 0x7FF, 0, 0 );\r
+ }\r
+ normalizeFloat64Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( ( aSig0 | aSig1 ) == 0 ) return packFloat64( zSign, 0, 0, 0 );\r
+ normalizeFloat64Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );\r
+ }\r
+ zExp = aExp - bExp + 0x3FD;\r
+ shortShift64Left( aSig0 | 0x00100000, aSig1, 11, &aSig0, &aSig1 );\r
+ shortShift64Left( bSig0 | 0x00100000, bSig1, 11, &bSig0, &bSig1 );\r
+ if ( le64( bSig0, bSig1, aSig0, aSig1 ) ) {\r
+ shift64Right( aSig0, aSig1, 1, &aSig0, &aSig1 );\r
+ ++zExp;\r
+ }\r
+ zSig0 = estimateDiv64To32( aSig0, aSig1, bSig0 );\r
+ mul64By32To96( bSig0, bSig1, zSig0, &term0, &term1, &term2 );\r
+ sub96( aSig0, aSig1, 0, term0, term1, term2, &rem0, &rem1, &rem2 );\r
+ while ( (sbits32) rem0 < 0 ) {\r
+ --zSig0;\r
+ add96( rem0, rem1, rem2, 0, bSig0, bSig1, &rem0, &rem1, &rem2 );\r
+ }\r
+ zSig1 = estimateDiv64To32( rem1, rem2, bSig0 );\r
+ if ( ( zSig1 & 0x3FF ) <= 4 ) {\r
+ mul64By32To96( bSig0, bSig1, zSig1, &term1, &term2, &term3 );\r
+ sub96( rem1, rem2, 0, term1, term2, term3, &rem1, &rem2, &rem3 );\r
+ while ( (sbits32) rem1 < 0 ) {\r
+ --zSig1;\r
+ add96( rem1, rem2, rem3, 0, bSig0, bSig1, &rem1, &rem2, &rem3 );\r
+ }\r
+ zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );\r
+ }\r
+ shift64ExtraRightJamming( zSig0, zSig1, 0, 11, &zSig0, &zSig1, &zSig2 );\r
+ return roundAndPackFloat64( zSign, zExp, zSig0, zSig1, zSig2 );\r
+\r
+}\r
+\r
+#ifndef SOFTFLOAT_FOR_GCC\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the remainder of the double-precision floating-point value `a'\r
+with respect to the corresponding value `b'. The operation is performed\r
+according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+float64 float64_rem( float64 a, float64 b )\r
+{\r
+ flag aSign, bSign, zSign;\r
+ int16 aExp, bExp, expDiff;\r
+ bits32 aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2;\r
+ bits32 allZero, alternateASig0, alternateASig1, sigMean1;\r
+ sbits32 sigMean0;\r
+ float64 z;\r
+\r
+ aSig1 = extractFloat64Frac1( a );\r
+ aSig0 = extractFloat64Frac0( a );\r
+ aExp = extractFloat64Exp( a );\r
+ aSign = extractFloat64Sign( a );\r
+ bSig1 = extractFloat64Frac1( b );\r
+ bSig0 = extractFloat64Frac0( b );\r
+ bExp = extractFloat64Exp( b );\r
+ bSign = extractFloat64Sign( b );\r
+ if ( aExp == 0x7FF ) {\r
+ if ( ( aSig0 | aSig1 )\r
+ || ( ( bExp == 0x7FF ) && ( bSig0 | bSig1 ) ) ) {\r
+ return propagateFloat64NaN( a, b );\r
+ }\r
+ goto invalid;\r
+ }\r
+ if ( bExp == 0x7FF ) {\r
+ if ( bSig0 | bSig1 ) return propagateFloat64NaN( a, b );\r
+ return a;\r
+ }\r
+ if ( bExp == 0 ) {\r
+ if ( ( bSig0 | bSig1 ) == 0 ) {\r
+ invalid:\r
+ float_raise( float_flag_invalid );\r
+ return float64_default_nan;\r
+ }\r
+ normalizeFloat64Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( ( aSig0 | aSig1 ) == 0 ) return a;\r
+ normalizeFloat64Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );\r
+ }\r
+ expDiff = aExp - bExp;\r
+ if ( expDiff < -1 ) return a;\r
+ shortShift64Left(\r
+ aSig0 | 0x00100000, aSig1, 11 - ( expDiff < 0 ), &aSig0, &aSig1 );\r
+ shortShift64Left( bSig0 | 0x00100000, bSig1, 11, &bSig0, &bSig1 );\r
+ q = le64( bSig0, bSig1, aSig0, aSig1 );\r
+ if ( q ) sub64( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 );\r
+ expDiff -= 32;\r
+ while ( 0 < expDiff ) {\r
+ q = estimateDiv64To32( aSig0, aSig1, bSig0 );\r
+ q = ( 4 < q ) ? q - 4 : 0;\r
+ mul64By32To96( bSig0, bSig1, q, &term0, &term1, &term2 );\r
+ shortShift96Left( term0, term1, term2, 29, &term1, &term2, &allZero );\r
+ shortShift64Left( aSig0, aSig1, 29, &aSig0, &allZero );\r
+ sub64( aSig0, 0, term1, term2, &aSig0, &aSig1 );\r
+ expDiff -= 29;\r
+ }\r
+ if ( -32 < expDiff ) {\r
+ q = estimateDiv64To32( aSig0, aSig1, bSig0 );\r
+ q = ( 4 < q ) ? q - 4 : 0;\r
+ q >>= - expDiff;\r
+ shift64Right( bSig0, bSig1, 8, &bSig0, &bSig1 );\r
+ expDiff += 24;\r
+ if ( expDiff < 0 ) {\r
+ shift64Right( aSig0, aSig1, - expDiff, &aSig0, &aSig1 );\r
+ }\r
+ else {\r
+ shortShift64Left( aSig0, aSig1, expDiff, &aSig0, &aSig1 );\r
+ }\r
+ mul64By32To96( bSig0, bSig1, q, &term0, &term1, &term2 );\r
+ sub64( aSig0, aSig1, term1, term2, &aSig0, &aSig1 );\r
+ }\r
+ else {\r
+ shift64Right( aSig0, aSig1, 8, &aSig0, &aSig1 );\r
+ shift64Right( bSig0, bSig1, 8, &bSig0, &bSig1 );\r
+ }\r
+ do {\r
+ alternateASig0 = aSig0;\r
+ alternateASig1 = aSig1;\r
+ ++q;\r
+ sub64( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 );\r
+ } while ( 0 <= (sbits32) aSig0 );\r
+ add64(\r
+ aSig0, aSig1, alternateASig0, alternateASig1, &sigMean0, &sigMean1 );\r
+ if ( ( sigMean0 < 0 )\r
+ || ( ( ( sigMean0 | sigMean1 ) == 0 ) && ( q & 1 ) ) ) {\r
+ aSig0 = alternateASig0;\r
+ aSig1 = alternateASig1;\r
+ }\r
+ zSign = ( (sbits32) aSig0 < 0 );\r
+ if ( zSign ) sub64( 0, 0, aSig0, aSig1, &aSig0, &aSig1 );\r
+ return\r
+ normalizeRoundAndPackFloat64( aSign ^ zSign, bExp - 4, aSig0, aSig1 );\r
+\r
+}\r
+#endif\r
+\r
+#ifndef SOFTFLOAT_FOR_GCC\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns the square root of the double-precision floating-point value `a'.\r
+The operation is performed according to the IEC/IEEE Standard for Binary\r
+Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+float64 float64_sqrt( float64 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp, zExp;\r
+ bits32 aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0;\r
+ bits32 rem0, rem1, rem2, rem3, term0, term1, term2, term3;\r
+ float64 z;\r
+\r
+ aSig1 = extractFloat64Frac1( a );\r
+ aSig0 = extractFloat64Frac0( a );\r
+ aExp = extractFloat64Exp( a );\r
+ aSign = extractFloat64Sign( a );\r
+ if ( aExp == 0x7FF ) {\r
+ if ( aSig0 | aSig1 ) return propagateFloat64NaN( a, a );\r
+ if ( ! aSign ) return a;\r
+ goto invalid;\r
+ }\r
+ if ( aSign ) {\r
+ if ( ( aExp | aSig0 | aSig1 ) == 0 ) return a;\r
+ invalid:\r
+ float_raise( float_flag_invalid );\r
+ return float64_default_nan;\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( ( aSig0 | aSig1 ) == 0 ) return packFloat64( 0, 0, 0, 0 );\r
+ normalizeFloat64Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );\r
+ }\r
+ zExp = ( ( aExp - 0x3FF )>>1 ) + 0x3FE;\r
+ aSig0 |= 0x00100000;\r
+ shortShift64Left( aSig0, aSig1, 11, &term0, &term1 );\r
+ zSig0 = ( estimateSqrt32( aExp, term0 )>>1 ) + 1;\r
+ if ( zSig0 == 0 ) zSig0 = 0x7FFFFFFF;\r
+ doubleZSig0 = zSig0 + zSig0;\r
+ shortShift64Left( aSig0, aSig1, 9 - ( aExp & 1 ), &aSig0, &aSig1 );\r
+ mul32To64( zSig0, zSig0, &term0, &term1 );\r
+ sub64( aSig0, aSig1, term0, term1, &rem0, &rem1 );\r
+ while ( (sbits32) rem0 < 0 ) {\r
+ --zSig0;\r
+ doubleZSig0 -= 2;\r
+ add64( rem0, rem1, 0, doubleZSig0 | 1, &rem0, &rem1 );\r
+ }\r
+ zSig1 = estimateDiv64To32( rem1, 0, doubleZSig0 );\r
+ if ( ( zSig1 & 0x1FF ) <= 5 ) {\r
+ if ( zSig1 == 0 ) zSig1 = 1;\r
+ mul32To64( doubleZSig0, zSig1, &term1, &term2 );\r
+ sub64( rem1, 0, term1, term2, &rem1, &rem2 );\r
+ mul32To64( zSig1, zSig1, &term2, &term3 );\r
+ sub96( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 );\r
+ while ( (sbits32) rem1 < 0 ) {\r
+ --zSig1;\r
+ shortShift64Left( 0, zSig1, 1, &term2, &term3 );\r
+ term3 |= 1;\r
+ term2 |= doubleZSig0;\r
+ add96( rem1, rem2, rem3, 0, term2, term3, &rem1, &rem2, &rem3 );\r
+ }\r
+ zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );\r
+ }\r
+ shift64ExtraRightJamming( zSig0, zSig1, 0, 10, &zSig0, &zSig1, &zSig2 );\r
+ return roundAndPackFloat64( 0, zExp, zSig0, zSig1, zSig2 );\r
+\r
+}\r
+#endif\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns 1 if the double-precision floating-point value `a' is equal to\r
+the corresponding value `b', and 0 otherwise. The comparison is performed\r
+according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+flag float64_eq( float64 a, float64 b )\r
+{\r
+\r
+ if ( ( ( extractFloat64Exp( a ) == 0x7FF )\r
+ && ( extractFloat64Frac0( a ) | extractFloat64Frac1( a ) ) )\r
+ || ( ( extractFloat64Exp( b ) == 0x7FF )\r
+ && ( extractFloat64Frac0( b ) | extractFloat64Frac1( b ) ) )\r
+ ) {\r
+ if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) {\r
+ float_raise( float_flag_invalid );\r
+ }\r
+ return 0;\r
+ }\r
+ return ( a == b ) ||\r
+ ( (bits64) ( ( FLOAT64_DEMANGLE(a) | FLOAT64_DEMANGLE(b) )<<1 ) == 0 );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns 1 if the double-precision floating-point value `a' is less than\r
+or equal to the corresponding value `b', and 0 otherwise. The comparison\r
+is performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+flag float64_le( float64 a, float64 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ if ( ( ( extractFloat64Exp( a ) == 0x7FF )\r
+ && ( extractFloat64Frac0( a ) | extractFloat64Frac1( a ) ) )\r
+ || ( ( extractFloat64Exp( b ) == 0x7FF )\r
+ && ( extractFloat64Frac0( b ) | extractFloat64Frac1( b ) ) )\r
+ ) {\r
+ float_raise( float_flag_invalid );\r
+ return 0;\r
+ }\r
+ aSign = extractFloat64Sign( a );\r
+ bSign = extractFloat64Sign( b );\r
+ if ( aSign != bSign )\r
+ return aSign ||\r
+ ( (bits64) ( ( FLOAT64_DEMANGLE(a) | FLOAT64_DEMANGLE(b) )<<1 ) ==\r
+ 0 );\r
+ return ( a == b ) ||\r
+ ( aSign ^ ( FLOAT64_DEMANGLE(a) < FLOAT64_DEMANGLE(b) ) );\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns 1 if the double-precision floating-point value `a' is less than\r
+the corresponding value `b', and 0 otherwise. The comparison is performed\r
+according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+flag float64_lt( float64 a, float64 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ if ( ( ( extractFloat64Exp( a ) == 0x7FF )\r
+ && ( extractFloat64Frac0( a ) | extractFloat64Frac1( a ) ) )\r
+ || ( ( extractFloat64Exp( b ) == 0x7FF )\r
+ && ( extractFloat64Frac0( b ) | extractFloat64Frac1( b ) ) )\r
+ ) {\r
+ float_raise( float_flag_invalid );\r
+ return 0;\r
+ }\r
+ aSign = extractFloat64Sign( a );\r
+ bSign = extractFloat64Sign( b );\r
+ if ( aSign != bSign )\r
+ return aSign &&\r
+ ( (bits64) ( ( FLOAT64_DEMANGLE(a) | FLOAT64_DEMANGLE(b) )<<1 ) !=\r
+ 0 );\r
+ return ( a != b ) &&\r
+ ( aSign ^ ( FLOAT64_DEMANGLE(a) < FLOAT64_DEMANGLE(b) ) );\r
+\r
+}\r
+\r
+#ifndef SOFTFLOAT_FOR_GCC\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns 1 if the double-precision floating-point value `a' is equal to\r
+the corresponding value `b', and 0 otherwise. The invalid exception is\r
+raised if either operand is a NaN. Otherwise, the comparison is performed\r
+according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+flag float64_eq_signaling( float64 a, float64 b )\r
+{\r
+\r
+ if ( ( ( extractFloat64Exp( a ) == 0x7FF )\r
+ && ( extractFloat64Frac0( a ) | extractFloat64Frac1( a ) ) )\r
+ || ( ( extractFloat64Exp( b ) == 0x7FF )\r
+ && ( extractFloat64Frac0( b ) | extractFloat64Frac1( b ) ) )\r
+ ) {\r
+ float_raise( float_flag_invalid );\r
+ return 0;\r
+ }\r
+ return ( a == b ) || ( (bits64) ( ( a | b )<<1 ) == 0 );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns 1 if the double-precision floating-point value `a' is less than or\r
+equal to the corresponding value `b', and 0 otherwise. Quiet NaNs do not\r
+cause an exception. Otherwise, the comparison is performed according to the\r
+IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+flag float64_le_quiet( float64 a, float64 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ if ( ( ( extractFloat64Exp( a ) == 0x7FF )\r
+ && ( extractFloat64Frac0( a ) | extractFloat64Frac1( a ) ) )\r
+ || ( ( extractFloat64Exp( b ) == 0x7FF )\r
+ && ( extractFloat64Frac0( b ) | extractFloat64Frac1( b ) ) )\r
+ ) {\r
+ if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) {\r
+ float_raise( float_flag_invalid );\r
+ }\r
+ return 0;\r
+ }\r
+ aSign = extractFloat64Sign( a );\r
+ bSign = extractFloat64Sign( b );\r
+ if ( aSign != bSign ) return aSign || ( (bits64) ( ( a | b )<<1 ) == 0 );\r
+ return ( a == b ) || ( aSign ^ ( a < b ) );\r
+\r
+}\r
+\r
+/*\r
+-------------------------------------------------------------------------------\r
+Returns 1 if the double-precision floating-point value `a' is less than\r
+the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an\r
+exception. Otherwise, the comparison is performed according to the IEC/IEEE\r
+Standard for Binary Floating-Point Arithmetic.\r
+-------------------------------------------------------------------------------\r
+*/\r
+flag float64_lt_quiet( float64 a, float64 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ if ( ( ( extractFloat64Exp( a ) == 0x7FF )\r
+ && ( extractFloat64Frac0( a ) | extractFloat64Frac1( a ) ) )\r
+ || ( ( extractFloat64Exp( b ) == 0x7FF )\r
+ && ( extractFloat64Frac0( b ) | extractFloat64Frac1( b ) ) )\r
+ ) {\r
+ if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) {\r
+ float_raise( float_flag_invalid );\r
+ }\r
+ return 0;\r
+ }\r
+ aSign = extractFloat64Sign( a );\r
+ bSign = extractFloat64Sign( b );\r
+ if ( aSign != bSign ) return aSign && ( (bits64) ( ( a | b )<<1 ) != 0 );\r
+ return ( a != b ) && ( aSign ^ ( a < b ) );\r
+\r
+}\r
+\r
+#endif\r
projects / mirror_edk2.git / blobdiff