UefiCpuPkg/CpuDxe: Fix out-of-sync issue in page attributes

[mirror_edk2.git] / UefiCpuPkg / CpuDxe / CpuDxe.c

diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c b/UefiCpuPkg/CpuDxe/CpuDxe.c
index 86806568a98b660cab2ddc9142f012ac4aac2073..4e8fa100e0e225435d635fd6e4952416f815e4df 100644 (file)
--- a/UefiCpuPkg/CpuDxe/CpuDxe.c
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.c
@@ -25,63 +25,63 @@
 BOOLEAN                   InterruptState = FALSE;\r
 EFI_HANDLE                mCpuHandle = NULL;\r
 BOOLEAN                   mIsFlushingGCD;\r
-UINT64                    mValidMtrrAddressMask = MTRR_LIB_CACHE_VALID_ADDRESS;\r
-UINT64                    mValidMtrrBitsMask    = MTRR_LIB_MSR_VALID_MASK;\r
+UINT64                    mValidMtrrAddressMask;\r
+UINT64                    mValidMtrrBitsMask;\r
 UINT64                    mTimerPeriod = 0;\r
 \r
 FIXED_MTRR    mFixedMtrrTable[] = {\r
   {\r
-    MTRR_LIB_IA32_MTRR_FIX64K_00000,\r
+    MSR_IA32_MTRR_FIX64K_00000,\r
     0,\r
     0x10000\r
   },\r
   {\r
-    MTRR_LIB_IA32_MTRR_FIX16K_80000,\r
+    MSR_IA32_MTRR_FIX16K_80000,\r
     0x80000,\r
     0x4000\r
   },\r
   {\r
-    MTRR_LIB_IA32_MTRR_FIX16K_A0000,\r
+    MSR_IA32_MTRR_FIX16K_A0000,\r
     0xA0000,\r
     0x4000\r
   },\r
   {\r
-    MTRR_LIB_IA32_MTRR_FIX4K_C0000,\r
+    MSR_IA32_MTRR_FIX4K_C0000,\r
     0xC0000,\r
     0x1000\r
   },\r
   {\r
-    MTRR_LIB_IA32_MTRR_FIX4K_C8000,\r
+    MSR_IA32_MTRR_FIX4K_C8000,\r
     0xC8000,\r
     0x1000\r
   },\r
   {\r
-    MTRR_LIB_IA32_MTRR_FIX4K_D0000,\r
+    MSR_IA32_MTRR_FIX4K_D0000,\r
     0xD0000,\r
     0x1000\r
   },\r
   {\r
-    MTRR_LIB_IA32_MTRR_FIX4K_D8000,\r
+    MSR_IA32_MTRR_FIX4K_D8000,\r
     0xD8000,\r
     0x1000\r
   },\r
   {\r
-    MTRR_LIB_IA32_MTRR_FIX4K_E0000,\r
+    MSR_IA32_MTRR_FIX4K_E0000,\r
     0xE0000,\r
     0x1000\r
   },\r
   {\r
-    MTRR_LIB_IA32_MTRR_FIX4K_E8000,\r
+    MSR_IA32_MTRR_FIX4K_E8000,\r
     0xE8000,\r
     0x1000\r
   },\r
   {\r
-    MTRR_LIB_IA32_MTRR_FIX4K_F0000,\r
+    MSR_IA32_MTRR_FIX4K_F0000,\r
     0xF0000,\r
     0x1000\r
   },\r
   {\r
-    MTRR_LIB_IA32_MTRR_FIX4K_F8000,\r
+    MSR_IA32_MTRR_FIX4K_F8000,\r
     0xF8000,\r
     0x1000\r
   },\r
@@ -510,13 +510,12 @@ InitializeMtrrMask (
     AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);\r
 \r
     PhysicalAddressBits = (UINT8) RegEax;\r
-\r
-    mValidMtrrBitsMask    = LShiftU64 (1, PhysicalAddressBits) - 1;\r
-    mValidMtrrAddressMask = mValidMtrrBitsMask & 0xfffffffffffff000ULL;\r
   } else {\r
-    mValidMtrrBitsMask    = MTRR_LIB_MSR_VALID_MASK;\r
-    mValidMtrrAddressMask = MTRR_LIB_CACHE_VALID_ADDRESS;\r
+    PhysicalAddressBits = 36;\r
   }\r
+\r
+  mValidMtrrBitsMask    = LShiftU64 (1, PhysicalAddressBits) - 1;\r
+  mValidMtrrAddressMask = mValidMtrrBitsMask & 0xfffffffffffff000ULL;\r
 }\r
 \r
 /**\r
@@ -864,6 +863,11 @@ RefreshGcdMemoryAttributes (
     FreePool (MemorySpaceMap);\r
   }\r
 \r
+  //\r
+  // Update page attributes\r
+  //\r
+  RefreshGcdMemoryAttributesFromPaging();\r
+\r
   mIsFlushingGCD = FALSE;\r
 }\r
 \r