/** @file\r
CPU DXE Module to produce CPU ARCH Protocol and CPU MP Protocol.\r
\r
- Copyright (c) 2008 - 2017, Intel Corporation. All rights reserved.<BR>\r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+ Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.<BR>\r
+ SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
\r
#include <Protocol/Cpu.h>\r
#include <Protocol/MpService.h>\r
-#include <Register/Msr.h>\r
+#include <Register/Intel/Msr.h>\r
\r
#include <Ppi/SecPlatformInformation.h>\r
#include <Ppi/SecPlatformInformation2.h>\r
#include <Guid/IdleLoopEvent.h>\r
#include <Guid/VectorHandoffTable.h>\r
\r
-#define EFI_MEMORY_CACHETYPE_MASK (EFI_MEMORY_UC | \\r
- EFI_MEMORY_WC | \\r
- EFI_MEMORY_WT | \\r
- EFI_MEMORY_WB | \\r
- EFI_MEMORY_UCE \\r
- )\r
+#define HEAP_GUARD_NONSTOP_MODE \\r
+ ((PcdGet8 (PcdHeapGuardPropertyMask) & (BIT6|BIT4|BIT1|BIT0)) > BIT6)\r
\r
-#define EFI_MEMORY_PAGETYPE_MASK (EFI_MEMORY_RP | \\r
- EFI_MEMORY_XP | \\r
- EFI_MEMORY_RO \\r
- )\r
+#define NULL_DETECTION_NONSTOP_MODE \\r
+ ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & (BIT6|BIT0)) > BIT6)\r
\r
/**\r
Flush CPU data cache. If the instruction cache is fully coherent\r
EFI_STATUS\r
EFIAPI\r
CpuFlushCpuDataCache (\r
- IN EFI_CPU_ARCH_PROTOCOL *This,\r
- IN EFI_PHYSICAL_ADDRESS Start,\r
- IN UINT64 Length,\r
- IN EFI_CPU_FLUSH_TYPE FlushType\r
+ IN EFI_CPU_ARCH_PROTOCOL *This,\r
+ IN EFI_PHYSICAL_ADDRESS Start,\r
+ IN UINT64 Length,\r
+ IN EFI_CPU_FLUSH_TYPE FlushType\r
);\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
CpuEnableInterrupt (\r
- IN EFI_CPU_ARCH_PROTOCOL *This\r
+ IN EFI_CPU_ARCH_PROTOCOL *This\r
);\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
CpuDisableInterrupt (\r
- IN EFI_CPU_ARCH_PROTOCOL *This\r
+ IN EFI_CPU_ARCH_PROTOCOL *This\r
);\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
CpuGetInterruptState (\r
- IN EFI_CPU_ARCH_PROTOCOL *This,\r
- OUT BOOLEAN *State\r
+ IN EFI_CPU_ARCH_PROTOCOL *This,\r
+ OUT BOOLEAN *State\r
);\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
CpuInit (\r
- IN EFI_CPU_ARCH_PROTOCOL *This,\r
- IN EFI_CPU_INIT_TYPE InitType\r
+ IN EFI_CPU_ARCH_PROTOCOL *This,\r
+ IN EFI_CPU_INIT_TYPE InitType\r
);\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
CpuRegisterInterruptHandler (\r
- IN EFI_CPU_ARCH_PROTOCOL *This,\r
- IN EFI_EXCEPTION_TYPE InterruptType,\r
- IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler\r
+ IN EFI_CPU_ARCH_PROTOCOL *This,\r
+ IN EFI_EXCEPTION_TYPE InterruptType,\r
+ IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler\r
);\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
CpuGetTimerValue (\r
- IN EFI_CPU_ARCH_PROTOCOL *This,\r
- IN UINT32 TimerIndex,\r
- OUT UINT64 *TimerValue,\r
- OUT UINT64 *TimerPeriod OPTIONAL\r
+ IN EFI_CPU_ARCH_PROTOCOL *This,\r
+ IN UINT32 TimerIndex,\r
+ OUT UINT64 *TimerValue,\r
+ OUT UINT64 *TimerPeriod OPTIONAL\r
);\r
\r
/**\r
- Set memory cacheability attributes for given range of memeory.\r
+ Set memory cacheability attributes for given range of memory.\r
\r
@param This Protocol instance structure\r
@param BaseAddress Specifies the start address of the\r
EFI_STATUS\r
EFIAPI\r
CpuSetMemoryAttributes (\r
- IN EFI_CPU_ARCH_PROTOCOL *This,\r
- IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
- IN UINT64 Length,\r
- IN UINT64 Attributes\r
+ IN EFI_CPU_ARCH_PROTOCOL *This,\r
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,\r
+ IN UINT64 Length,\r
+ IN UINT64 Attributes\r
);\r
\r
/**\r
VOID\r
EFIAPI\r
SetCodeSelector (\r
- UINT16 Selector\r
+ UINT16 Selector\r
);\r
\r
/**\r
VOID\r
EFIAPI\r
SetDataSelectors (\r
- UINT16 Selector\r
+ UINT16 Selector\r
);\r
\r
+/**\r
+ Update GCD memory space attributes according to current page table setup.\r
+**/\r
VOID\r
RefreshGcdMemoryAttributesFromPaging (\r
VOID\r
);\r
\r
-#endif\r
+/**\r
+ Special handler for #DB exception, which will restore the page attributes\r
+ (not-present). It should work with #PF handler which will set pages to\r
+ 'present'.\r
+\r
+ @param ExceptionType Exception type.\r
+ @param SystemContext Pointer to EFI_SYSTEM_CONTEXT.\r
\r
+**/\r
+VOID\r
+EFIAPI\r
+DebugExceptionHandler (\r
+ IN EFI_EXCEPTION_TYPE ExceptionType,\r
+ IN EFI_SYSTEM_CONTEXT SystemContext\r
+ );\r
+\r
+/**\r
+ Special handler for #PF exception, which will set the pages which caused\r
+ #PF to be 'present'. The attribute of those pages should be restored in\r
+ the subsequent #DB handler.\r
+\r
+ @param ExceptionType Exception type.\r
+ @param SystemContext Pointer to EFI_SYSTEM_CONTEXT.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+PageFaultExceptionHandler (\r
+ IN EFI_EXCEPTION_TYPE ExceptionType,\r
+ IN EFI_SYSTEM_CONTEXT SystemContext\r
+ );\r
+\r
+extern BOOLEAN mIsAllocatingPageTable;\r
+extern UINTN mNumberOfProcessors;\r
+\r
+#endif\r