C based implementation of IA32 interrupt handling only\r
requiring a minimal assembly interrupt entry point.\r
\r
- Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2006 - 2021, Intel Corporation. All rights reserved.<BR>\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
//\r
// Global descriptor table (GDT) Template\r
//\r
-STATIC GDT_ENTRIES GdtTemplate = {\r
+STATIC GDT_ENTRIES mGdtTemplate = {\r
//\r
// NULL_SEL\r
//\r
VOID\r
)\r
{\r
- GDT_ENTRIES *gdt;\r
- IA32_DESCRIPTOR gdtPtr;\r
+ GDT_ENTRIES *Gdt;\r
+ IA32_DESCRIPTOR Gdtr;\r
\r
//\r
// Allocate Runtime Data for the GDT\r
//\r
- gdt = AllocateRuntimePool (sizeof (GdtTemplate) + 8);\r
- ASSERT (gdt != NULL);\r
- gdt = ALIGN_POINTER (gdt, 8);\r
+ Gdt = AllocateRuntimePool (sizeof (mGdtTemplate) + 8);\r
+ ASSERT (Gdt != NULL);\r
+ Gdt = ALIGN_POINTER (Gdt, 8);\r
\r
//\r
// Initialize all GDT entries\r
//\r
- CopyMem (gdt, &GdtTemplate, sizeof (GdtTemplate));\r
+ CopyMem (Gdt, &mGdtTemplate, sizeof (mGdtTemplate));\r
\r
//\r
// Write GDT register\r
//\r
- gdtPtr.Base = (UINT32)(UINTN)(VOID*) gdt;\r
- gdtPtr.Limit = (UINT16) (sizeof (GdtTemplate) - 1);\r
- AsmWriteGdtr (&gdtPtr);\r
+ Gdtr.Base = (UINT32) (UINTN) Gdt;\r
+ Gdtr.Limit = (UINT16) (sizeof (mGdtTemplate) - 1);\r
+ AsmWriteGdtr (&Gdtr);\r
\r
//\r
// Update selector (segment) registers base on new GDT\r
SetCodeSelector ((UINT16)CPU_CODE_SEL);\r
SetDataSelectors ((UINT16)CPU_DATA_SEL);\r
}\r
-\r