-#
-# ConvertAsm.py: Automatically generated from CpuAsm.asm
-#
-# TITLE CpuAsm.asm:
-
-#------------------------------------------------------------------------------
-#*
-#* Copyright 2006 - 2009, Intel Corporation
-#* All rights reserved. This program and the accompanying materials
-#* are licensed and made available under the terms and conditions of the BSD License
-#* which accompanies this distribution. The full text of the license may be found at
-#* http://opensource.org/licenses/bsd-license.php
-#*
-#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#*
-#* CpuAsm.S
-#*
-#* Abstract:
-#*
-#------------------------------------------------------------------------------
-
-
-#.MMX
-#.XMM
-
-#EXTRN ASM_PFX(mErrorCodeFlag):DWORD # Error code flags for exceptions
-
-
-#
-# point to the external interrupt vector table
-#
-ExternalVectorTablePtr:
- .byte 0, 0, 0, 0
-
-.intel_syntax
-ASM_GLOBAL ASM_PFX(InitializeExternalVectorTablePtr)
-ASM_PFX(InitializeExternalVectorTablePtr):
- mov eax, [esp+4]
- mov ExternalVectorTablePtr, eax
- ret
-
-#------------------------------------------------------------------------------
-# VOID
-# SetCodeSelector (
-# UINT16 Selector
-# );
-#------------------------------------------------------------------------------
-.intel_syntax
-ASM_GLOBAL ASM_PFX(SetCodeSelector)
-ASM_PFX(SetCodeSelector):
- mov %ecx, [%esp+4]
- sub %esp, 0x10
- lea %eax, setCodeSelectorLongJump
- mov [%esp], %eax
- mov [%esp+4], %cx
- jmp fword ptr [%esp]
-setCodeSelectorLongJump:
- add %esp, 0x10
- ret
-
-#------------------------------------------------------------------------------
-# VOID
-# SetDataSelectors (
-# UINT16 Selector
-# );
-#------------------------------------------------------------------------------
-.intel_syntax
-ASM_GLOBAL ASM_PFX(SetDataSelectors)
-ASM_PFX(SetDataSelectors):
- mov %ecx, [%esp+4]
- mov %ss, %cx
- mov %ds, %cx
- mov %es, %cx
- mov %fs, %cx
- mov %gs, %cx
- ret
-
-#---------------------------------------;
-# CommonInterruptEntry ;
-#---------------------------------------;
-# The follow algorithm is used for the common interrupt routine.
-
-.intel_syntax
-ASM_GLOBAL ASM_PFX(CommonInterruptEntry)
-ASM_PFX(CommonInterruptEntry):
- cli
- #
- # All interrupt handlers are invoked through interrupt gates, so
- # IF flag automatically cleared at the entry point
- #
-
- #
- # Calculate vector number
- #
- # Get the return address of call, actually, it is the
- # address of vector number.
- #
- xchg ecx, [esp]
- mov cx, [ecx]
- and ecx, 0x0FFFF
- cmp ecx, 32 # Intel reserved vector for exceptions?
- jae NoErrorCode
- bt ASM_PFX(mErrorCodeFlag), ecx
- jc HasErrorCode
-
-NoErrorCode:
-
- #
- # Stack:
- # +---------------------+
- # + EFlags +
- # +---------------------+
- # + CS +
- # +---------------------+
- # + EIP +
- # +---------------------+
- # + ECX +
- # +---------------------+ <-- ESP
- #
- # Registers:
- # ECX - Vector Number
- #
-
- #
- # Put Vector Number on stack
- #
- push ecx
-
- #
- # Put 0 (dummy) error code on stack, and restore ECX
- #
- xor ecx, ecx # ECX = 0
- xchg ecx, [esp+4]
-
- jmp ErrorCodeAndVectorOnStack
-
-HasErrorCode:
-
- #
- # Stack:
- # +---------------------+
- # + EFlags +
- # +---------------------+
- # + CS +
- # +---------------------+
- # + EIP +
- # +---------------------+
- # + Error Code +
- # +---------------------+
- # + ECX +
- # +---------------------+ <-- ESP
- #
- # Registers:
- # ECX - Vector Number
- #
-
- #
- # Put Vector Number on stack and restore ECX
- #
- xchg ecx, [esp]
-
- #
- # Fall through to join main routine code
- # at ErrorCodeAndVectorOnStack
- #
-CommonInterruptEntry_al_0000:
- jmp CommonInterruptEntry_al_0000
-
-ErrorCodeAndVectorOnStack:
- push ebp
- mov ebp, esp
-
- #
- # Stack:
- # +---------------------+
- # + EFlags +
- # +---------------------+
- # + CS +
- # +---------------------+
- # + EIP +
- # +---------------------+
- # + Error Code +
- # +---------------------+
- # + Vector Number +
- # +---------------------+
- # + EBP +
- # +---------------------+ <-- EBP
- #
-
- #
- # Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32
- # is 16-byte aligned
- #
- and esp, 0x0fffffff0
- sub esp, 12
-
-#; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
- push eax
- push ecx
- push edx
- push ebx
- lea ecx, [ebp + 6 * 4]
- push ecx # ESP
- push dword ptr [ebp] # EBP
- push esi
- push edi
-
-#; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
- mov eax, ss
- push eax
- movzx eax, word ptr [ebp + 4 * 4]
- push eax
- mov eax, ds
- push eax
- mov eax, es
- push eax
- mov eax, fs
- push eax
- mov eax, gs
- push eax
-
-#; UINT32 Eip;
- mov eax, [ebp + 3 * 4]
- push eax
-
-#; UINT32 Gdtr[2], Idtr[2];
- sub esp, 8
- sidt [esp]
- mov eax, [esp + 2]
- xchg eax, [esp]
- and eax, 0x0FFFF
- mov [esp+4], eax
-
- sub esp, 8
- sgdt [esp]
- mov eax, [esp + 2]
- xchg eax, [esp]
- and eax, 0x0FFFF
- mov [esp+4], eax
-
-#; UINT32 Ldtr, Tr;
- xor eax, eax
- str ax
- push eax
- sldt ax
- push eax
-
-#; UINT32 EFlags;
- mov eax, [ebp + 5 * 4]
- push eax
-
-#; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
- mov eax, cr4
- or eax, 0x208
- mov cr4, eax
- push eax
- mov eax, cr3
- push eax
- mov eax, cr2
- push eax
- xor eax, eax
- push eax
- mov eax, cr0
- push eax
-
-#; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
- mov eax, dr7
- push eax
-#; clear Dr7 while executing debugger itself
- xor eax, eax
- mov dr7, eax
-
- mov eax, dr6
- push eax
-#; insure all status bits in dr6 are clear...
- xor eax, eax
- mov dr6, eax
-
- mov eax, dr3
- push eax
- mov eax, dr2
- push eax
- mov eax, dr1
- push eax
- mov eax, dr0
- push eax
-
-#; FX_SAVE_STATE_IA32 FxSaveState;
- sub esp, 512
- mov edi, esp
- .byte 0x0f, 0x0ae, 0x07 #fxsave [edi]
-
-#; UINT32 ExceptionData;
- push dword ptr [ebp + 2 * 4]
-
-#; call into exception handler
- mov eax, ExternalVectorTablePtr # get the interrupt vectors base
- or eax, eax # NULL?
- jz nullExternalExceptionHandler
-
- mov ecx, [ebp + 4]
- mov eax, [eax + ecx * 4]
- or eax, eax # NULL?
- jz nullExternalExceptionHandler
-
-#; Prepare parameter and call
- mov edx, esp
- push edx
- mov edx, dword ptr [ebp + 1 * 4]
- push edx
-
- #
- # Call External Exception Handler
- #
- call eax
- add esp, 8
-
-nullExternalExceptionHandler:
-
- cli
-#; UINT32 ExceptionData;
- add esp, 4
-
-#; FX_SAVE_STATE_IA32 FxSaveState;
- mov esi, esp
- .byte 0x0f, 0x0ae, 0x0e # fxrstor [esi]
- add esp, 512
-
-#; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
- pop eax
- mov dr0, eax
- pop eax
- mov dr1, eax
- pop eax
- mov dr2, eax
- pop eax
- mov dr3, eax
-#; skip restore of dr6. We cleared dr6 during the context save.
- add esp, 4
- pop eax
- mov dr7, eax
-
-#; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;
- pop eax
- mov cr0, eax
- add esp, 4 # not for Cr1
- pop eax
- mov cr2, eax
- pop eax
- mov cr3, eax
- pop eax
- mov cr4, eax
-
-#; UINT32 EFlags;
- pop dword ptr [ebp + 5 * 4]
-
-#; UINT32 Ldtr, Tr;
-#; UINT32 Gdtr[2], Idtr[2];
-#; Best not let anyone mess with these particular registers...
- add esp, 24
-
-#; UINT32 Eip;
- pop dword ptr [ebp + 3 * 4]
-
-#; UINT32 Gs, Fs, Es, Ds, Cs, Ss;
-#; NOTE - modified segment registers could hang the debugger... We
-#; could attempt to insulate ourselves against this possibility,
-#; but that poses risks as well.
-#;
- pop gs
- pop fs
- pop es
- pop ds
- pop dword ptr [ebp + 4 * 4]
- pop ss
-
-#; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;
- pop edi
- pop esi
- add esp, 4 # not for ebp
- add esp, 4 # not for esp
- pop ebx
- pop edx
- pop ecx
- pop eax
-
- mov esp, ebp
- pop ebp
- add esp, 8
- iretd
-
-
-#END
-
+#------------------------------------------------------------------------------\r
+#*\r
+#* Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
+#* This program and the accompanying materials\r
+#* are licensed and made available under the terms and conditions of the BSD License\r
+#* which accompanies this distribution. The full text of the license may be found at\r
+#* http://opensource.org/licenses/bsd-license.php\r
+#*\r
+#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#*\r
+#* CpuAsm.S\r
+#*\r
+#* Abstract:\r
+#*\r
+#------------------------------------------------------------------------------\r
+\r
+\r
+#.MMX\r
+#.XMM\r
+\r
+#EXTRN ASM_PFX(mErrorCodeFlag):DWORD # Error code flags for exceptions\r
+\r
+\r
+#\r
+# point to the external interrupt vector table\r
+#\r
+ExternalVectorTablePtr:\r
+ .byte 0, 0, 0, 0\r
+\r
+ASM_GLOBAL ASM_PFX(InitializeExternalVectorTablePtr)\r
+ASM_PFX(InitializeExternalVectorTablePtr):\r
+ movl 4(%esp), %eax\r
+ movl %eax, ExternalVectorTablePtr\r
+ ret\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# SetCodeSelector (\r
+# UINT16 Selector\r
+# );\r
+#------------------------------------------------------------------------------\r
+ASM_GLOBAL ASM_PFX(SetCodeSelector)\r
+ASM_PFX(SetCodeSelector):\r
+ movl 4(%esp), %ecx\r
+ subl $0x10, %esp \r
+ leal setCodeSelectorLongJump, %eax \r
+ movl %eax, (%esp)\r
+ movw %cx, 4(%esp)\r
+ .byte 0xFF, 0x2C, 0x24 # jmp *(%esp) note:(FWORD jmp) \r
+setCodeSelectorLongJump:\r
+ addl $0x10, %esp \r
+ ret\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# SetDataSelectors (\r
+# UINT16 Selector\r
+# );\r
+#------------------------------------------------------------------------------\r
+ASM_GLOBAL ASM_PFX(SetDataSelectors)\r
+ASM_PFX(SetDataSelectors):\r
+ movl 4(%esp), %ecx\r
+ movw %cx, %ss\r
+ movw %cx, %ds\r
+ movw %cx, %es\r
+ movw %cx, %fs\r
+ movw %cx, %gs\r
+ ret\r
+\r
+#---------------------------------------;\r
+# CommonInterruptEntry ;\r
+#---------------------------------------;\r
+# The follow algorithm is used for the common interrupt routine.\r
+\r
+ASM_GLOBAL ASM_PFX(CommonInterruptEntry)\r
+ASM_PFX(CommonInterruptEntry):\r
+ cli\r
+ #\r
+ # All interrupt handlers are invoked through interrupt gates, so\r
+ # IF flag automatically cleared at the entry point\r
+ #\r
+\r
+ #\r
+ # Calculate vector number\r
+ #\r
+ # Get the return address of call, actually, it is the\r
+ # address of vector number.\r
+ #\r
+ xchgl (%esp), %ecx\r
+ movw (%ecx), %cx\r
+ andl $0x0FFFF, %ecx\r
+ cmpl $32, %ecx # Intel reserved vector for exceptions?\r
+ jae NoErrorCode\r
+ bt %ecx, ASM_PFX(mErrorCodeFlag)\r
+ jc HasErrorCode\r
+\r
+NoErrorCode:\r
+\r
+ #\r
+ # Stack:\r
+ # +---------------------+\r
+ # + EFlags +\r
+ # +---------------------+\r
+ # + CS +\r
+ # +---------------------+\r
+ # + EIP +\r
+ # +---------------------+\r
+ # + ECX +\r
+ # +---------------------+ <-- ESP\r
+ #\r
+ # Registers:\r
+ # ECX - Vector Number\r
+ #\r
+\r
+ #\r
+ # Put Vector Number on stack\r
+ #\r
+ pushl %ecx\r
+\r
+ #\r
+ # Put 0 (dummy) error code on stack, and restore ECX\r
+ #\r
+ xorl %ecx, %ecx # ECX = 0\r
+ xchgl 4(%esp), %ecx\r
+\r
+ jmp ErrorCodeAndVectorOnStack\r
+\r
+HasErrorCode:\r
+\r
+ #\r
+ # Stack:\r
+ # +---------------------+\r
+ # + EFlags +\r
+ # +---------------------+\r
+ # + CS +\r
+ # +---------------------+\r
+ # + EIP +\r
+ # +---------------------+\r
+ # + Error Code +\r
+ # +---------------------+\r
+ # + ECX +\r
+ # +---------------------+ <-- ESP\r
+ #\r
+ # Registers:\r
+ # ECX - Vector Number\r
+ #\r
+\r
+ #\r
+ # Put Vector Number on stack and restore ECX\r
+ #\r
+ xchgl (%esp), %ecx \r
+\r
+ #\r
+ # Fall through to join main routine code\r
+ # at ErrorCodeAndVectorOnStack\r
+ #\r
+CommonInterruptEntry_al_0000:\r
+ jmp CommonInterruptEntry_al_0000\r
+\r
+ErrorCodeAndVectorOnStack:\r
+ pushl %ebp\r
+ movl %esp, %ebp\r
+\r
+ #\r
+ # Stack:\r
+ # +---------------------+\r
+ # + EFlags +\r
+ # +---------------------+\r
+ # + CS +\r
+ # +---------------------+\r
+ # + EIP +\r
+ # +---------------------+\r
+ # + Error Code +\r
+ # +---------------------+\r
+ # + Vector Number +\r
+ # +---------------------+\r
+ # + EBP +\r
+ # +---------------------+ <-- EBP\r
+ #\r
+\r
+ #\r
+ # Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32\r
+ # is 16-byte aligned\r
+ #\r
+ andl $0x0fffffff0, %esp \r
+ subl $12, %esp\r
+\r
+#; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;\r
+ pushl %eax\r
+ pushl %ecx\r
+ pushl %edx\r
+ pushl %ebx\r
+ leal 24(%ebp), %ecx\r
+ pushl %ecx # ESP\r
+ pushl (%ebp) # EBP\r
+ pushl %esi\r
+ pushl %edi\r
+\r
+#; UINT32 Gs, Fs, Es, Ds, Cs, Ss;\r
+ movl %ss, %eax\r
+ pushl %eax\r
+ movzwl 16(%ebp), %eax \r
+ pushl %eax\r
+ movl %ds, %eax\r
+ pushl %eax\r
+ movl %es, %eax\r
+ pushl %eax\r
+ movl %fs, %eax\r
+ pushl %eax\r
+ movl %gs, %eax\r
+ pushl %eax\r
+\r
+#; UINT32 Eip;\r
+ movl 12(%ebp), %eax\r
+ pushl %eax\r
+\r
+#; UINT32 Gdtr[2], Idtr[2];\r
+ subl $8, %esp\r
+ sidt (%esp)\r
+ movl 2(%esp), %eax\r
+ xchgl (%esp), %eax\r
+ andl $0x0FFFF, %eax \r
+ movl %eax, 4(%esp)\r
+\r
+ subl $8, %esp\r
+ sgdt (%esp)\r
+ movl 2(%esp), %eax\r
+ xchgl (%esp), %eax\r
+ andl $0x0FFFF, %eax \r
+ movl %eax, 4(%esp)\r
+\r
+#; UINT32 Ldtr, Tr;\r
+ xorl %eax, %eax\r
+ str %ax\r
+ pushl %eax\r
+ sldt %ax\r
+ pushl %eax\r
+\r
+#; UINT32 EFlags;\r
+ movl 20(%ebp), %eax\r
+ pushl %eax\r
+\r
+#; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;\r
+ movl %cr4, %eax\r
+ orl $0x208, %eax\r
+ movl %eax, %cr4\r
+ pushl %eax\r
+ movl %cr3, %eax\r
+ pushl %eax\r
+ movl %cr2, %eax\r
+ pushl %eax\r
+ xorl %eax, %eax\r
+ pushl %eax\r
+ movl %cr0, %eax\r
+ pushl %eax\r
+\r
+#; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
+ movl %dr7, %eax\r
+ pushl %eax\r
+#; clear Dr7 while executing debugger itself\r
+ xorl %eax, %eax\r
+ movl %eax, %dr7\r
+\r
+ movl %dr6, %eax\r
+ pushl %eax\r
+#; insure all status bits in dr6 are clear...\r
+ xorl %eax, %eax\r
+ movl %eax, %dr6\r
+\r
+ movl %dr3, %eax\r
+ pushl %eax\r
+ movl %dr2, %eax\r
+ pushl %eax\r
+ movl %dr1, %eax\r
+ pushl %eax\r
+ movl %dr0, %eax\r
+ pushl %eax\r
+\r
+#; FX_SAVE_STATE_IA32 FxSaveState;\r
+ subl $512, %esp\r
+ movl %esp, %edi\r
+ .byte 0x0f, 0x0ae, 0x07 #fxsave [edi]\r
+\r
+#; UINT32 ExceptionData;\r
+ pushl 8(%ebp)\r
+\r
+#; call into exception handler\r
+ movl ExternalVectorTablePtr, %eax # get the interrupt vectors base\r
+ orl %eax, %eax # NULL?\r
+ jz nullExternalExceptionHandler\r
+\r
+ mov 4(%ebp), %ecx\r
+ movl (%eax,%ecx,4), %eax\r
+ orl %eax, %eax # NULL?\r
+ jz nullExternalExceptionHandler\r
+\r
+#; Prepare parameter and call\r
+ movl %esp, %edx\r
+ pushl %edx\r
+ movl 4(%ebp), %edx\r
+ pushl %edx\r
+\r
+ #\r
+ # Call External Exception Handler\r
+ #\r
+ call *%eax\r
+ addl $8, %esp\r
+\r
+nullExternalExceptionHandler:\r
+\r
+ cli\r
+#; UINT32 ExceptionData;\r
+ addl $4, %esp\r
+\r
+#; FX_SAVE_STATE_IA32 FxSaveState;\r
+ movl %esp, %esi\r
+ .byte 0x0f, 0x0ae, 0x0e # fxrstor [esi]\r
+ addl $512, %esp\r
+\r
+#; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
+ popl %eax\r
+ movl %eax, %dr0\r
+ popl %eax\r
+ movl %eax, %dr1\r
+ popl %eax\r
+ movl %eax, %dr2\r
+ popl %eax\r
+ movl %eax, %dr3\r
+#; skip restore of dr6. We cleared dr6 during the context save.\r
+ addl $4, %esp\r
+ popl %eax\r
+ movl %eax, %dr7\r
+\r
+#; UINT32 Cr0, Cr1, Cr2, Cr3, Cr4;\r
+ popl %eax\r
+ movl %eax, %cr0\r
+ addl $4, %esp # not for Cr1\r
+ popl %eax\r
+ movl %eax, %cr2\r
+ popl %eax\r
+ movl %eax, %cr3\r
+ popl %eax\r
+ movl %eax, %cr4\r
+\r
+#; UINT32 EFlags;\r
+ popl 20(%ebp)\r
+\r
+#; UINT32 Ldtr, Tr;\r
+#; UINT32 Gdtr[2], Idtr[2];\r
+#; Best not let anyone mess with these particular registers...\r
+ addl $24, %esp\r
+\r
+#; UINT32 Eip;\r
+ popl 12(%ebp)\r
+\r
+#; UINT32 Gs, Fs, Es, Ds, Cs, Ss;\r
+#; NOTE - modified segment registers could hang the debugger... We\r
+#; could attempt to insulate ourselves against this possibility,\r
+#; but that poses risks as well.\r
+#;\r
+ popl %gs\r
+ popl %fs\r
+ popl %es\r
+ popl %ds\r
+ popl 16(%ebp)\r
+ popl %ss\r
+\r
+#; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;\r
+ popl %edi\r
+ popl %esi\r
+ addl $4, %esp # not for ebp\r
+ addl $4, %esp # not for esp\r
+ popl %ebx\r
+ popl %edx\r
+ popl %ecx\r
+ popl %eax\r
+\r
+ movl %ebp, %esp\r
+ popl %ebp\r
+ addl $8, %esp\r
+ iretl\r
+\r
+\r
+#END\r
+\r
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