-# TITLE CpuAsm.S:
-
-#------------------------------------------------------------------------------
-#*
-#* Copyright 2008 - 2009, Intel Corporation
-#* All rights reserved. This program and the accompanying materials
-#* are licensed and made available under the terms and conditions of the BSD License
-#* which accompanies this distribution. The full text of the license may be found at
-#* http://opensource.org/licenses/bsd-license.php
-#*
-#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#*
-#* CpuAsm.S
-#*
-#* Abstract:
-#*
-#------------------------------------------------------------------------------
-
-
-#text SEGMENT
-
-
-#EXTRN ASM_PFX(mErrorCodeFlag):DWORD # Error code flags for exceptions
-
-
-#
-# point to the external interrupt vector table
-#
-ExternalVectorTablePtr:
- .byte 0, 0, 0, 0, 0, 0, 0, 0
-
-ASM_GLOBAL ASM_PFX(InitializeExternalVectorTablePtr)
-ASM_PFX(InitializeExternalVectorTablePtr):
- lea ExternalVectorTablePtr(%rip), %rax # save vector number
- mov %rcx, (%rax)
- ret
-
-
-#------------------------------------------------------------------------------
-# VOID
-# SetCodeSelector (
-# UINT16 Selector
-# );
-#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(SetCodeSelector)
-ASM_PFX(SetCodeSelector):
- subq $0x10, %rsp
- leaq setCodeSelectorLongJump(%rip), %rax
- movq %rax, (%rsp)
- movw %cx, 4(%rsp)
- .byte 0xFF, 0x2C, 0x24 # jmp (%rsp) note:fword jmp
-setCodeSelectorLongJump:
- addq $0x10, %rsp
- ret
-
-#------------------------------------------------------------------------------
-# VOID
-# SetDataSelectors (
-# UINT16 Selector
-# );
-#------------------------------------------------------------------------------
-ASM_GLOBAL ASM_PFX(SetDataSelectors)
-ASM_PFX(SetDataSelectors):
- movw %cx, %ss
- movw %cx, %ds
- movw %cx, %es
- movw %cx, %fs
- movw %cx, %gs
- ret
-
-#---------------------------------------;
-# CommonInterruptEntry ;
-#---------------------------------------;
-# The follow algorithm is used for the common interrupt routine.
-
-ASM_GLOBAL ASM_PFX(CommonInterruptEntry)
-ASM_PFX(CommonInterruptEntry):
- cli
- #
- # All interrupt handlers are invoked through interrupt gates, so
- # IF flag automatically cleared at the entry point
- #
- #
- # Calculate vector number
- #
- xchgq (%rsp), %rcx # get the return address of call, actually, it is the address of vector number.
- movzwl (%rcx), %ecx
- cmp $32, %ecx # Intel reserved vector for exceptions?
- jae NoErrorCode
- pushq %rax
- leaq ASM_PFX(mErrorCodeFlag)(%rip), %rax
- bt %ecx, (%rax)
- popq %rax
- jc CommonInterruptEntry_al_0000
-
-NoErrorCode:
-
- #
- # Push a dummy error code on the stack
- # to maintain coherent stack map
- #
- pushq (%rsp)
- movq $0, 8(%rsp)
-CommonInterruptEntry_al_0000:
- pushq %rbp
- movq %rsp, %rbp
-
- #
- # Stack:
- # +---------------------+ <-- 16-byte aligned ensured by processor
- # + Old SS +
- # +---------------------+
- # + Old RSP +
- # +---------------------+
- # + RFlags +
- # +---------------------+
- # + CS +
- # +---------------------+
- # + RIP +
- # +---------------------+
- # + Error Code +
- # +---------------------+
- # + RCX / Vector Number +
- # +---------------------+
- # + RBP +
- # +---------------------+ <-- RBP, 16-byte aligned
- #
-
-
- #
- # Since here the stack pointer is 16-byte aligned, so
- # EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64
- # is 16-byte aligned
- #
-
-#; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
-#; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
- pushq %r15
- pushq %r14
- pushq %r13
- pushq %r12
- pushq %r11
- pushq %r10
- pushq %r9
- pushq %r8
- pushq %rax
- pushq 8(%rbp) # RCX
- pushq %rdx
- pushq %rbx
- pushq 48(%rbp) # RSP
- pushq (%rbp) # RBP
- pushq %rsi
- pushq %rdi
-
-#; UINT64 Gs, Fs, Es, Ds, Cs, Ss; insure high 16 bits of each is zero
- movzwq 56(%rbp), %rax
- pushq %rax # for ss
- movzwq 32(%rbp), %rax
- pushq %rax # for cs
- movq %ds, %rax
- pushq %rax
- movq %es, %rax
- pushq %rax
- movq %fs, %rax
- pushq %rax
- movq %gs, %rax
- pushq %rax
-
- movq %rcx, 8(%rbp) # save vector number
-
-#; UINT64 Rip;
- pushq 24(%rbp)
-
-#; UINT64 Gdtr[2], Idtr[2];
- xorq %rax, %rax
- pushq %rax
- pushq %rax
- sidt (%rsp)
- xchgq 2(%rsp), %rax
- xchgq (%rsp), %rax
- xchgq 8(%rsp), %rax
-
- xorq %rax, %rax
- pushq %rax
- pushq %rax
- sgdt (%rsp)
- xchgq 2(%rsp), %rax
- xchgq (%rsp), %rax
- xchgq 8(%rsp), %rax
-
-#; UINT64 Ldtr, Tr;
- xorq %rax, %rax
- str %ax
- pushq %rax
- sldt %ax
- pushq %rax
-
-#; UINT64 RFlags;
- pushq 40(%rbp)
-
-#; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
- movq %cr8, %rax
- pushq %rax
- movq %cr4, %rax
- orq $0x208, %rax
- movq %rax, %cr4
- pushq %rax
- mov %cr3, %rax
- pushq %rax
- mov %cr2, %rax
- pushq %rax
- xorq %rax, %rax
- pushq %rax
- mov %cr0, %rax
- pushq %rax
-
-#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
- movq %dr7, %rax
- pushq %rax
-#; clear Dr7 while executing debugger itself
- xorq %rax, %rax
- movq %rax, %dr7
-
- movq %dr6, %rax
- pushq %rax
-#; insure all status bits in dr6 are clear...
- xorq %rax, %rax
- movq %rax, %dr6
-
- movq %dr3, %rax
- pushq %rax
- movq %dr2, %rax
- pushq %rax
- movq %dr1, %rax
- pushq %rax
- movq %dr0, %rax
- pushq %rax
-
-#; FX_SAVE_STATE_X64 FxSaveState;
- subq $512, %rsp
- movq %rsp, %rdi
- .byte 0x0f, 0x0ae, 0x07 #fxsave [rdi]
-
-#; UINT32 ExceptionData;
- pushq 16(%rbp)
-
-#; call into exception handler
- movq 8(%rbp), %rcx
- leaq ExternalVectorTablePtr(%rip), %rax
- movl (%eax), %eax
- movq (%rax,%rcx,8), %rax
- orq %rax, %rax # NULL?
-
- je nonNullValue#
-
-#; Prepare parameter and call
-# mov rcx, [rbp + 8]
- mov %rsp, %rdx
- #
- # Per X64 calling convention, allocate maximum parameter stack space
- # and make sure RSP is 16-byte aligned
- #
- subq $40, %rsp
- call *%rax
- addq $40, %rsp
-
-nonNullValue:
- cli
-#; UINT64 ExceptionData;
- addq $8, %rsp
-
-#; FX_SAVE_STATE_X64 FxSaveState;
-
- movq %rsp, %rsi
- .byte 0x0f, 0x0ae, 0x0E # fxrstor [rsi]
- addq $512, %rsp
-
-#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;
- popq %rax
- movq %rax, %dr0
- popq %rax
- movq %rax, %dr1
- popq %rax
- movq %rax, %dr2
- popq %rax
- movq %rax, %dr3
-#; skip restore of dr6. We cleared dr6 during the context save.
- addq $8, %rsp
- popq %rax
- movq %rax, %dr7
-
-#; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;
- popq %rax
- movq %rax, %cr0
- addq $8, %rsp # not for Cr1
- popq %rax
- movq %rax, %cr2
- popq %rax
- movq %rax, %cr3
- popq %rax
- movq %rax, %cr4
- popq %rax
- movq %rax, %cr8
-
-#; UINT64 RFlags;
- popq 40(%rbp)
-
-#; UINT64 Ldtr, Tr;
-#; UINT64 Gdtr[2], Idtr[2];
-#; Best not let anyone mess with these particular registers...
- addq $48, %rsp
-
-#; UINT64 Rip;
- popq 24(%rbp)
-
-#; UINT64 Gs, Fs, Es, Ds, Cs, Ss;
- popq %rax
- # mov %rax, %gs ; not for gs
- popq %rax
- # mov %rax, %fs ; not for fs
- # (X64 will not use fs and gs, so we do not restore it)
- popq %rax
- movq %rax, %es
- popq %rax
- movq %rax, %ds
- popq 32(%rbp) # for cs
- popq 56(%rbp) # for ss
-
-#; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;
-#; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;
- popq %rdi
- popq %rsi
- addq $8, %rsp # not for rbp
- popq 48(%rbp) # for rsp
- popq %rbx
- popq %rdx
- popq %rcx
- popq %rax
- popq %r8
- popq %r9
- popq %r10
- popq %r11
- popq %r12
- popq %r13
- popq %r14
- popq %r15
-
- movq %rbp, %rsp
- popq %rbp
- addq $16, %rsp
- iretq
-
-
-#text ENDS
-
-#END
-
-
+# TITLE CpuAsm.S: \r
+\r
+#------------------------------------------------------------------------------\r
+#*\r
+#* Copyright 2008 - 2009, Intel Corporation\r
+#* All rights reserved. This program and the accompanying materials\r
+#* are licensed and made available under the terms and conditions of the BSD License\r
+#* which accompanies this distribution. The full text of the license may be found at\r
+#* http://opensource.org/licenses/bsd-license.php\r
+#*\r
+#* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+#* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#*\r
+#* CpuAsm.S\r
+#*\r
+#* Abstract:\r
+#*\r
+#------------------------------------------------------------------------------\r
+\r
+\r
+#text SEGMENT\r
+\r
+\r
+#EXTRN ASM_PFX(mErrorCodeFlag):DWORD # Error code flags for exceptions\r
+\r
+\r
+#\r
+# point to the external interrupt vector table\r
+#\r
+ExternalVectorTablePtr:\r
+ .byte 0, 0, 0, 0, 0, 0, 0, 0\r
+\r
+ASM_GLOBAL ASM_PFX(InitializeExternalVectorTablePtr)\r
+ASM_PFX(InitializeExternalVectorTablePtr):\r
+ lea ExternalVectorTablePtr(%rip), %rax # save vector number\r
+ mov %rcx, (%rax) \r
+ ret\r
+\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# SetCodeSelector (\r
+# UINT16 Selector\r
+# );\r
+#------------------------------------------------------------------------------\r
+ASM_GLOBAL ASM_PFX(SetCodeSelector)\r
+ASM_PFX(SetCodeSelector):\r
+ subq $0x10, %rsp \r
+ leaq setCodeSelectorLongJump(%rip), %rax \r
+ movq %rax, (%rsp) \r
+ movw %cx, 4(%rsp)\r
+ .byte 0xFF, 0x2C, 0x24 # jmp (%rsp) note:fword jmp\r
+setCodeSelectorLongJump:\r
+ addq $0x10, %rsp\r
+ ret\r
+\r
+#------------------------------------------------------------------------------\r
+# VOID\r
+# SetDataSelectors (\r
+# UINT16 Selector\r
+# );\r
+#------------------------------------------------------------------------------\r
+ASM_GLOBAL ASM_PFX(SetDataSelectors)\r
+ASM_PFX(SetDataSelectors):\r
+ movw %cx, %ss\r
+ movw %cx, %ds\r
+ movw %cx, %es\r
+ movw %cx, %fs\r
+ movw %cx, %gs\r
+ ret\r
+\r
+#---------------------------------------;\r
+# CommonInterruptEntry ;\r
+#---------------------------------------;\r
+# The follow algorithm is used for the common interrupt routine.\r
+\r
+ASM_GLOBAL ASM_PFX(CommonInterruptEntry)\r
+ASM_PFX(CommonInterruptEntry):\r
+ cli\r
+ #\r
+ # All interrupt handlers are invoked through interrupt gates, so\r
+ # IF flag automatically cleared at the entry point\r
+ #\r
+ #\r
+ # Calculate vector number\r
+ #\r
+ xchgq (%rsp), %rcx # get the return address of call, actually, it is the address of vector number.\r
+ movzwl (%rcx), %ecx \r
+ cmp $32, %ecx # Intel reserved vector for exceptions?\r
+ jae NoErrorCode\r
+ pushq %rax\r
+ leaq ASM_PFX(mErrorCodeFlag)(%rip), %rax\r
+ bt %ecx, (%rax) \r
+ popq %rax\r
+ jc CommonInterruptEntry_al_0000\r
+\r
+NoErrorCode:\r
+\r
+ #\r
+ # Push a dummy error code on the stack\r
+ # to maintain coherent stack map\r
+ #\r
+ pushq (%rsp)\r
+ movq $0, 8(%rsp)\r
+CommonInterruptEntry_al_0000:\r
+ pushq %rbp\r
+ movq %rsp, %rbp\r
+\r
+ #\r
+ # Stack:\r
+ # +---------------------+ <-- 16-byte aligned ensured by processor\r
+ # + Old SS +\r
+ # +---------------------+\r
+ # + Old RSP +\r
+ # +---------------------+\r
+ # + RFlags +\r
+ # +---------------------+\r
+ # + CS +\r
+ # +---------------------+\r
+ # + RIP +\r
+ # +---------------------+\r
+ # + Error Code +\r
+ # +---------------------+\r
+ # + RCX / Vector Number +\r
+ # +---------------------+\r
+ # + RBP +\r
+ # +---------------------+ <-- RBP, 16-byte aligned\r
+ #\r
+\r
+\r
+ #\r
+ # Since here the stack pointer is 16-byte aligned, so\r
+ # EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64\r
+ # is 16-byte aligned\r
+ #\r
+\r
+#; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
+#; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;\r
+ pushq %r15\r
+ pushq %r14\r
+ pushq %r13\r
+ pushq %r12\r
+ pushq %r11\r
+ pushq %r10\r
+ pushq %r9\r
+ pushq %r8\r
+ pushq %rax\r
+ pushq 8(%rbp) # RCX\r
+ pushq %rdx\r
+ pushq %rbx\r
+ pushq 48(%rbp) # RSP\r
+ pushq (%rbp) # RBP\r
+ pushq %rsi\r
+ pushq %rdi\r
+\r
+#; UINT64 Gs, Fs, Es, Ds, Cs, Ss; insure high 16 bits of each is zero\r
+ movzwq 56(%rbp), %rax\r
+ pushq %rax # for ss\r
+ movzwq 32(%rbp), %rax\r
+ pushq %rax # for cs\r
+ movq %ds, %rax\r
+ pushq %rax\r
+ movq %es, %rax\r
+ pushq %rax\r
+ movq %fs, %rax\r
+ pushq %rax\r
+ movq %gs, %rax\r
+ pushq %rax\r
+\r
+ movq %rcx, 8(%rbp) # save vector number\r
+\r
+#; UINT64 Rip;\r
+ pushq 24(%rbp)\r
+\r
+#; UINT64 Gdtr[2], Idtr[2];\r
+ xorq %rax, %rax\r
+ pushq %rax\r
+ pushq %rax\r
+ sidt (%rsp)\r
+ xchgq 2(%rsp), %rax\r
+ xchgq (%rsp), %rax\r
+ xchgq 8(%rsp), %rax\r
+\r
+ xorq %rax, %rax\r
+ pushq %rax\r
+ pushq %rax\r
+ sgdt (%rsp)\r
+ xchgq 2(%rsp), %rax\r
+ xchgq (%rsp), %rax\r
+ xchgq 8(%rsp), %rax\r
+\r
+#; UINT64 Ldtr, Tr;\r
+ xorq %rax, %rax\r
+ str %ax\r
+ pushq %rax\r
+ sldt %ax\r
+ pushq %rax\r
+\r
+#; UINT64 RFlags;\r
+ pushq 40(%rbp)\r
+\r
+#; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
+ movq %cr8, %rax\r
+ pushq %rax\r
+ movq %cr4, %rax\r
+ orq $0x208, %rax \r
+ movq %rax, %cr4 \r
+ pushq %rax\r
+ mov %cr3, %rax \r
+ pushq %rax\r
+ mov %cr2, %rax \r
+ pushq %rax\r
+ xorq %rax, %rax\r
+ pushq %rax\r
+ mov %cr0, %rax \r
+ pushq %rax\r
+\r
+#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
+ movq %dr7, %rax\r
+ pushq %rax\r
+#; clear Dr7 while executing debugger itself\r
+ xorq %rax, %rax\r
+ movq %rax, %dr7\r
+\r
+ movq %dr6, %rax\r
+ pushq %rax\r
+#; insure all status bits in dr6 are clear...\r
+ xorq %rax, %rax\r
+ movq %rax, %dr6\r
+\r
+ movq %dr3, %rax\r
+ pushq %rax\r
+ movq %dr2, %rax\r
+ pushq %rax\r
+ movq %dr1, %rax\r
+ pushq %rax\r
+ movq %dr0, %rax\r
+ pushq %rax\r
+\r
+#; FX_SAVE_STATE_X64 FxSaveState;\r
+ subq $512, %rsp\r
+ movq %rsp, %rdi\r
+ .byte 0x0f, 0x0ae, 0x07 #fxsave [rdi]\r
+\r
+#; UINT32 ExceptionData;\r
+ pushq 16(%rbp)\r
+\r
+#; call into exception handler\r
+ movq 8(%rbp), %rcx\r
+ leaq ExternalVectorTablePtr(%rip), %rax\r
+ movl (%eax), %eax\r
+ movq (%rax,%rcx,8), %rax\r
+ orq %rax, %rax # NULL?\r
+\r
+ je nonNullValue#\r
+\r
+#; Prepare parameter and call\r
+# mov rcx, [rbp + 8]\r
+ mov %rsp, %rdx\r
+ #\r
+ # Per X64 calling convention, allocate maximum parameter stack space\r
+ # and make sure RSP is 16-byte aligned\r
+ #\r
+ subq $40, %rsp \r
+ call *%rax\r
+ addq $40, %rsp\r
+\r
+nonNullValue:\r
+ cli\r
+#; UINT64 ExceptionData;\r
+ addq $8, %rsp\r
+\r
+#; FX_SAVE_STATE_X64 FxSaveState;\r
+\r
+ movq %rsp, %rsi\r
+ .byte 0x0f, 0x0ae, 0x0E # fxrstor [rsi]\r
+ addq $512, %rsp\r
+\r
+#; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
+ popq %rax\r
+ movq %rax, %dr0\r
+ popq %rax\r
+ movq %rax, %dr1\r
+ popq %rax\r
+ movq %rax, %dr2\r
+ popq %rax\r
+ movq %rax, %dr3\r
+#; skip restore of dr6. We cleared dr6 during the context save.\r
+ addq $8, %rsp\r
+ popq %rax\r
+ movq %rax, %dr7\r
+\r
+#; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
+ popq %rax\r
+ movq %rax, %cr0\r
+ addq $8, %rsp # not for Cr1\r
+ popq %rax\r
+ movq %rax, %cr2\r
+ popq %rax\r
+ movq %rax, %cr3\r
+ popq %rax\r
+ movq %rax, %cr4\r
+ popq %rax\r
+ movq %rax, %cr8\r
+\r
+#; UINT64 RFlags;\r
+ popq 40(%rbp)\r
+\r
+#; UINT64 Ldtr, Tr;\r
+#; UINT64 Gdtr[2], Idtr[2];\r
+#; Best not let anyone mess with these particular registers...\r
+ addq $48, %rsp\r
+\r
+#; UINT64 Rip;\r
+ popq 24(%rbp)\r
+\r
+#; UINT64 Gs, Fs, Es, Ds, Cs, Ss;\r
+ popq %rax\r
+ # mov %rax, %gs ; not for gs\r
+ popq %rax\r
+ # mov %rax, %fs ; not for fs\r
+ # (X64 will not use fs and gs, so we do not restore it)\r
+ popq %rax\r
+ movq %rax, %es\r
+ popq %rax\r
+ movq %rax, %ds\r
+ popq 32(%rbp) # for cs\r
+ popq 56(%rbp) # for ss\r
+\r
+#; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
+#; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;\r
+ popq %rdi\r
+ popq %rsi\r
+ addq $8, %rsp # not for rbp\r
+ popq 48(%rbp) # for rsp\r
+ popq %rbx\r
+ popq %rdx\r
+ popq %rcx\r
+ popq %rax\r
+ popq %r8\r
+ popq %r9\r
+ popq %r10\r
+ popq %r11\r
+ popq %r12\r
+ popq %r13\r
+ popq %r14\r
+ popq %r15\r
+\r
+ movq %rbp, %rsp\r
+ popq %rbp\r
+ addq $16, %rsp\r
+ iretq\r
+\r
+\r
+#text ENDS\r
+\r
+#END\r
+\r
+\r