+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>\r
+;\r
+; This program and the accompanying materials are licensed and made available\r
+; under the terms and conditions of the BSD License which accompanies this\r
+; distribution. The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php.\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+ .code\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; IoReadFifo8 (\r
+; IN UINTN Port, // rcx\r
+; IN UINTN Size, // rdx\r
+; IN VOID *Buffer // r8\r
+; );\r
+;------------------------------------------------------------------------------\r
+IoReadFifo8 PROC\r
+ cld\r
+ xchg rcx, rdx\r
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi\r
+rep insb\r
+ mov rdi, r8 ; restore rdi\r
+ ret\r
+IoReadFifo8 ENDP\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; IoReadFifo16 (\r
+; IN UINTN Port, // rcx\r
+; IN UINTN Size, // rdx\r
+; IN VOID *Buffer // r8\r
+; );\r
+;------------------------------------------------------------------------------\r
+IoReadFifo16 PROC\r
+ cld\r
+ xchg rcx, rdx\r
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi\r
+rep insw\r
+ mov rdi, r8 ; restore rdi\r
+ ret\r
+IoReadFifo16 ENDP\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; IoReadFifo32 (\r
+; IN UINTN Port, // rcx\r
+; IN UINTN Size, // rdx\r
+; IN VOID *Buffer // r8\r
+; );\r
+;------------------------------------------------------------------------------\r
+IoReadFifo32 PROC\r
+ cld\r
+ xchg rcx, rdx\r
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi\r
+rep insd\r
+ mov rdi, r8 ; restore rdi\r
+ ret\r
+IoReadFifo32 ENDP\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; IoWriteFifo8 (\r
+; IN UINTN Port, // rcx\r
+; IN UINTN Size, // rdx\r
+; IN VOID *Buffer // r8\r
+; );\r
+;------------------------------------------------------------------------------\r
+IoWriteFifo8 PROC\r
+ cld\r
+ xchg rcx, rdx\r
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi\r
+rep outsb\r
+ mov rsi, r8 ; restore rsi\r
+ ret\r
+IoWriteFifo8 ENDP\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; IoWriteFifo16 (\r
+; IN UINTN Port, // rcx\r
+; IN UINTN Size, // rdx\r
+; IN VOID *Buffer // r8\r
+; );\r
+;------------------------------------------------------------------------------\r
+IoWriteFifo16 PROC\r
+ cld\r
+ xchg rcx, rdx\r
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi\r
+rep outsw\r
+ mov rsi, r8 ; restore rsi\r
+ ret\r
+IoWriteFifo16 ENDP\r
+\r
+;------------------------------------------------------------------------------\r
+; VOID\r
+; EFIAPI\r
+; IoWriteFifo32 (\r
+; IN UINTN Port, // rcx\r
+; IN UINTN Size, // rdx\r
+; IN VOID *Buffer // r8\r
+; );\r
+;------------------------------------------------------------------------------\r
+IoWriteFifo32 PROC\r
+ cld\r
+ xchg rcx, rdx\r
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi\r
+rep outsd\r
+ mov rsi, r8 ; restore rsi\r
+ ret\r
+IoWriteFifo32 ENDP\r
+\r
+ END\r
+\r