/** @file\r
CPU PEI Module installs CPU Multiple Processor PPI.\r
\r
- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
\r
#include "CpuMpPei.h"\r
\r
-//\r
-// Global Descriptor Table (GDT)\r
-//\r
-GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT mGdtEntries[] = {\r
-/* selector { Global Segment Descriptor } */\r
-/* 0x00 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //null descriptor\r
-/* 0x08 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear data segment descriptor\r
-/* 0x10 */ {{0xffff, 0, 0, 0xf, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear code segment descriptor\r
-/* 0x18 */ {{0xffff, 0, 0, 0x3, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor\r
-/* 0x20 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system code segment descriptor\r
-/* 0x28 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor\r
-/* 0x30 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor\r
-/* 0x38 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 1, 0, 1, 0}}, //system code segment descriptor\r
-/* 0x40 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor\r
-};\r
-\r
-//\r
-// IA32 Gdt register\r
-//\r
-GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR mGdt = {\r
- sizeof (mGdtEntries) - 1,\r
- (UINTN) mGdtEntries\r
- };\r
-\r
GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_NOTIFY_DESCRIPTOR mNotifyList = {\r
(EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
&gEfiEndOfPeiSignalPpiGuid,\r
// Sync BSP's Mtrr table to all wakeup APs and load microcode on APs.\r
//\r
MtrrSetAllMtrrs (&PeiCpuMpData->MtrrTable);\r
- MicrocodeDetect ();\r
+ MicrocodeDetect (PeiCpuMpData);\r
PeiCpuMpData->CpuData[ProcessorNumber].State = CpuStateIdle;\r
} else {\r
//\r
}\r
}\r
ApStartupSignalBuffer = PeiCpuMpData->CpuData[ProcessorNumber].StartupApSignal;\r
- //\r
- // Clear AP start-up signal\r
- //\r
- *ApStartupSignalBuffer = 0;\r
while (TRUE) {\r
DisableInterrupts ();\r
if (PeiCpuMpData->ApLoopMode == ApInMwaitLoop) {\r
// otherwise place AP in loop again\r
//\r
if (*ApStartupSignalBuffer == WAKEUP_AP_SIGNAL) {\r
+ //\r
+ // Clear AP start-up signal when AP waken up\r
+ //\r
+ InterlockedCompareExchange32 (\r
+ (UINT32 *)ApStartupSignalBuffer,\r
+ WAKEUP_AP_SIGNAL,\r
+ 0\r
+ );\r
break;\r
}\r
}\r
}\r
}\r
\r
+/**\r
+ Write AP start-up signal to wakeup AP.\r
+\r
+ @param ApStartupSignalBuffer Pointer to AP wakeup signal\r
+**/\r
+VOID\r
+WriteStartupSignal (\r
+ IN volatile UINT32 *ApStartupSignalBuffer\r
+ )\r
+{\r
+ *ApStartupSignalBuffer = WAKEUP_AP_SIGNAL;\r
+ //\r
+ // If AP is waken up, StartupApSignal should be cleared.\r
+ // Otherwise, write StartupApSignal again till AP waken up.\r
+ //\r
+ while (InterlockedCompareExchange32 (\r
+ (UINT32 *)ApStartupSignalBuffer,\r
+ WAKEUP_AP_SIGNAL,\r
+ WAKEUP_AP_SIGNAL\r
+ ) != 0) {\r
+ CpuPause ();\r
+ }\r
+}\r
+\r
/**\r
This function will be called by BSP to wakeup AP.\r
\r
@param PeiCpuMpData Pointer to PEI CPU MP Data\r
@param Broadcast TRUE: Send broadcast IPI to all APs\r
FALSE: Send IPI to AP by ApicId\r
- @param ApicId Apic ID for the processor to be waked\r
+ @param ProcessorNumber The handle number of specified processor\r
@param Procedure The function to be invoked by AP\r
@param ProcedureArgument The argument to be passed into AP function\r
**/\r
WakeUpAP (\r
IN PEI_CPU_MP_DATA *PeiCpuMpData,\r
IN BOOLEAN Broadcast,\r
- IN UINT32 ApicId,\r
+ IN UINTN ProcessorNumber,\r
IN EFI_AP_PROCEDURE Procedure, OPTIONAL\r
IN VOID *ProcedureArgument OPTIONAL\r
)\r
{\r
volatile MP_CPU_EXCHANGE_INFO *ExchangeInfo;\r
+ UINTN Index;\r
\r
PeiCpuMpData->ApFunction = (UINTN) Procedure;\r
PeiCpuMpData->ApFunctionArgument = (UINTN) ProcedureArgument;\r
ExchangeInfo->PmodeOffset = PeiCpuMpData->AddressMap.PModeEntryOffset;\r
ExchangeInfo->LmodeOffset = PeiCpuMpData->AddressMap.LModeEntryOffset;\r
ExchangeInfo->Cr3 = AsmReadCr3 ();\r
+ ExchangeInfo->CodeSegment = AsmReadCs ();\r
+ ExchangeInfo->DataSegment = AsmReadDs ();\r
ExchangeInfo->CFunction = (UINTN) ApCFunction;\r
ExchangeInfo->NumApsExecuting = 0;\r
ExchangeInfo->PeiCpuMpData = PeiCpuMpData;\r
//\r
// Get the BSP's data of GDT and IDT\r
//\r
- CopyMem ((VOID *)&ExchangeInfo->GdtrProfile, &mGdt, sizeof(mGdt));\r
+ AsmReadGdtr ((IA32_DESCRIPTOR *) &ExchangeInfo->GdtrProfile);\r
AsmReadIdtr ((IA32_DESCRIPTOR *) &ExchangeInfo->IdtrProfile);\r
\r
- if (Broadcast) {\r
- SendInitSipiSipiAllExcludingSelf ((UINT32) ExchangeInfo->BufferStart);\r
- } else {\r
- SendInitSipiSipi (ApicId, (UINT32) ExchangeInfo->BufferStart);\r
+ if (PeiCpuMpData->ApLoopMode == ApInMwaitLoop) {\r
+ //\r
+ // Get AP target C-state each time when waking up AP,\r
+ // for it maybe updated by platform again\r
+ //\r
+ PeiCpuMpData->ApTargetCState = PcdGet8 (PcdCpuApTargetCstate);\r
}\r
\r
+ //\r
+ // Wakeup APs per AP loop state\r
+ //\r
+ if (PeiCpuMpData->ApLoopMode == ApInHltLoop || PeiCpuMpData->InitFlag) {\r
+ if (Broadcast) {\r
+ SendInitSipiSipiAllExcludingSelf ((UINT32) ExchangeInfo->BufferStart);\r
+ } else {\r
+ SendInitSipiSipi (\r
+ PeiCpuMpData->CpuData[ProcessorNumber].ApicId,\r
+ (UINT32) ExchangeInfo->BufferStart\r
+ );\r
+ }\r
+ } else if ((PeiCpuMpData->ApLoopMode == ApInMwaitLoop) ||\r
+ (PeiCpuMpData->ApLoopMode == ApInRunLoop)) {\r
+ if (Broadcast) {\r
+ for (Index = 0; Index < PeiCpuMpData->CpuCount; Index++) {\r
+ if (Index != PeiCpuMpData->BspNumber) {\r
+ WriteStartupSignal (PeiCpuMpData->CpuData[Index].StartupApSignal);\r
+ }\r
+ }\r
+ } else {\r
+ WriteStartupSignal (PeiCpuMpData->CpuData[ProcessorNumber].StartupApSignal);\r
+ }\r
+ } else {\r
+ ASSERT (FALSE);\r
+ }\r
return ;\r
}\r
\r
//\r
// Load Microcode on BSP\r
//\r
- MicrocodeDetect ();\r
+ MicrocodeDetect (PeiCpuMpData);\r
//\r
// Store BSP's MTRR setting\r
//\r
if (PeiCpuMpData->X2ApicEnable) {\r
DEBUG ((EFI_D_INFO, "Force x2APIC mode!\n"));\r
//\r
- // Send 2nd broadcast IPI to all APs to enable x2APIC mode\r
+ // Wakeup all APs to enable x2APIC mode\r
//\r
WakeUpAP (PeiCpuMpData, TRUE, 0, ApFuncEnableX2Apic, NULL);\r
//\r
IN CONST EFI_PEI_SERVICES **PeiServices\r
)\r
{\r
- EFI_STATUS Status;\r
- PEI_CPU_MP_DATA *PeiCpuMpData;\r
- UINT32 ProcessorCount;\r
+ EFI_STATUS Status;\r
+ PEI_CPU_MP_DATA *PeiCpuMpData;\r
+ EFI_VECTOR_HANDOFF_INFO *VectorInfo;\r
+ EFI_PEI_VECTOR_HANDOFF_INFO_PPI *VectorHandoffInfoPpi;\r
\r
//\r
- // Load new GDT table on BSP\r
+ // Get Vector Hand-off Info PPI\r
//\r
- AsmInitializeGdt (&mGdt);\r
+ VectorInfo = NULL;\r
+ Status = PeiServicesLocatePpi (\r
+ &gEfiVectorHandoffInfoPpiGuid,\r
+ 0,\r
+ NULL,\r
+ (VOID **)&VectorHandoffInfoPpi\r
+ );\r
+ if (Status == EFI_SUCCESS) {\r
+ VectorInfo = VectorHandoffInfoPpi->Info;\r
+ }\r
+ Status = InitializeCpuExceptionHandlers (VectorInfo);\r
+ ASSERT_EFI_ERROR (Status);\r
//\r
// Get wakeup buffer and copy AP reset code in it\r
//\r
//\r
// Count processor number and collect processor information\r
//\r
- ProcessorCount = CountProcessorNumber (PeiCpuMpData);\r
+ CountProcessorNumber (PeiCpuMpData);\r
//\r
// Build location of PEI CPU MP DATA buffer in HOB\r
//\r
projects / mirror_edk2.git / blobdiff