/** @file\r
CPU PEI Module installs CPU Multiple Processor PPI.\r
\r
- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
\r
#include "CpuMpPei.h"\r
\r
-//\r
-// Global Descriptor Table (GDT)\r
-//\r
-GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT mGdtEntries[] = {\r
-/* selector { Global Segment Descriptor } */\r
-/* 0x00 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //null descriptor\r
-/* 0x08 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear data segment descriptor\r
-/* 0x10 */ {{0xffff, 0, 0, 0xf, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear code segment descriptor\r
-/* 0x18 */ {{0xffff, 0, 0, 0x3, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor\r
-/* 0x20 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system code segment descriptor\r
-/* 0x28 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor\r
-/* 0x30 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor\r
-/* 0x38 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 1, 0, 1, 0}}, //system code segment descriptor\r
-/* 0x40 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor\r
-};\r
-\r
-//\r
-// IA32 Gdt register\r
-//\r
-GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR mGdt = {\r
- sizeof (mGdtEntries) - 1,\r
- (UINTN) mGdtEntries\r
- };\r
-\r
GLOBAL_REMOVE_IF_UNREFERENCED EFI_PEI_NOTIFY_DESCRIPTOR mNotifyList = {\r
(EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
&gEfiEndOfPeiSignalPpiGuid,\r
SetApicMode (LOCAL_APIC_MODE_X2APIC);\r
}\r
\r
+/**\r
+ Get AP loop mode.\r
+\r
+ @param MonitorFilterSize Returns the largest monitor-line size in bytes.\r
+\r
+ @return The AP loop mode.\r
+**/\r
+UINT8\r
+GetApLoopMode (\r
+ OUT UINT16 *MonitorFilterSize\r
+ )\r
+{\r
+ UINT8 ApLoopMode;\r
+ UINT32 RegEbx;\r
+ UINT32 RegEcx;\r
+ UINT32 RegEdx;\r
+\r
+ ASSERT (MonitorFilterSize != NULL);\r
+\r
+ ApLoopMode = PcdGet8 (PcdCpuApLoopMode);\r
+ ASSERT (ApLoopMode >= ApInHltLoop && ApLoopMode <= ApInRunLoop);\r
+ if (ApLoopMode == ApInMwaitLoop) {\r
+ AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, &RegEcx, NULL);\r
+ if ((RegEcx & BIT3) == 0) {\r
+ //\r
+ // If processor does not support MONITOR/MWAIT feature\r
+ // by CPUID.[EAX=01H]:ECX.BIT3, force AP in Hlt-loop mode\r
+ //\r
+ ApLoopMode = ApInHltLoop;\r
+ }\r
+ }\r
+\r
+ if (ApLoopMode == ApInHltLoop) {\r
+ *MonitorFilterSize = 0;\r
+ } else if (ApLoopMode == ApInRunLoop) {\r
+ *MonitorFilterSize = sizeof (UINT32);\r
+ } else if (ApLoopMode == ApInMwaitLoop) {\r
+ //\r
+ // CPUID.[EAX=05H]:EBX.BIT0-15: Largest monitor-line size in bytes\r
+ // CPUID.[EAX=05H].EDX: C-states supported using MWAIT\r
+ //\r
+ AsmCpuid (CPUID_MONITOR_MWAIT, NULL, &RegEbx, NULL, &RegEdx);\r
+ *MonitorFilterSize = RegEbx & 0xFFFF;\r
+ }\r
+\r
+ return ApLoopMode;\r
+}\r
+\r
/**\r
Get CPU MP Data pointer from the Guided HOB.\r
\r
}\r
\r
/**\r
- Save the volatile registers required to be restored following INIT IPI\r
+ Save the volatile registers required to be restored following INIT IPI.\r
\r
@param VolatileRegisters Returns buffer saved the volatile resisters\r
**/\r
}\r
\r
/**\r
- Restore the volatile registers following INIT IPI\r
+ Restore the volatile registers following INIT IPI.\r
\r
@param VolatileRegisters Pointer to volatile resisters\r
@param IsRestoreDr TRUE: Restore DRx if supported\r
This function will be called from AP reset code if BSP uses WakeUpAP.\r
\r
@param ExchangeInfo Pointer to the MP exchange info buffer\r
- @param NumApsExecuting Number of curret executing AP\r
+ @param NumApsExecuting Number of current executing AP\r
**/\r
VOID\r
EFIAPI\r
UINTN ProcessorNumber;\r
EFI_AP_PROCEDURE Procedure;\r
UINTN BistData;\r
+ volatile UINT32 *ApStartupSignalBuffer;\r
\r
PeiCpuMpData = ExchangeInfo->PeiCpuMpData;\r
- if (PeiCpuMpData->InitFlag) {\r
- ProcessorNumber = NumApsExecuting;\r
- //\r
- // Sync BSP's Control registers to APs\r
- //\r
- RestoreVolatileRegisters (&PeiCpuMpData->CpuData[0].VolatileRegisters, FALSE);\r
- //\r
- // This is first time AP wakeup, get BIST information from AP stack\r
- //\r
- BistData = *(UINTN *) (PeiCpuMpData->Buffer + ProcessorNumber * PeiCpuMpData->CpuApStackSize - sizeof (UINTN));\r
- PeiCpuMpData->CpuData[ProcessorNumber].Health.Uint32 = (UINT32) BistData;\r
- PeiCpuMpData->CpuData[ProcessorNumber].ApicId = GetInitialApicId ();\r
- if (PeiCpuMpData->CpuData[ProcessorNumber].ApicId >= 0xFF) {\r
+ while (TRUE) {\r
+ if (PeiCpuMpData->InitFlag) {\r
+ ProcessorNumber = NumApsExecuting;\r
+ //\r
+ // Sync BSP's Control registers to APs\r
+ //\r
+ RestoreVolatileRegisters (&PeiCpuMpData->CpuData[0].VolatileRegisters, FALSE);\r
//\r
- // Set x2APIC mode if there are any logical processor reporting\r
- // an APIC ID of 255 or greater.\r
+ // This is first time AP wakeup, get BIST information from AP stack\r
//\r
- AcquireSpinLock(&PeiCpuMpData->MpLock);\r
- PeiCpuMpData->X2ApicEnable = TRUE;\r
- ReleaseSpinLock(&PeiCpuMpData->MpLock);\r
+ BistData = *(UINTN *) (PeiCpuMpData->Buffer + ProcessorNumber * PeiCpuMpData->CpuApStackSize - sizeof (UINTN));\r
+ PeiCpuMpData->CpuData[ProcessorNumber].Health.Uint32 = (UINT32) BistData;\r
+ PeiCpuMpData->CpuData[ProcessorNumber].ApicId = GetInitialApicId ();\r
+ if (PeiCpuMpData->CpuData[ProcessorNumber].ApicId >= 0xFF) {\r
+ //\r
+ // Set x2APIC mode if there are any logical processor reporting\r
+ // an APIC ID of 255 or greater.\r
+ //\r
+ AcquireSpinLock(&PeiCpuMpData->MpLock);\r
+ PeiCpuMpData->X2ApicEnable = TRUE;\r
+ ReleaseSpinLock(&PeiCpuMpData->MpLock);\r
+ }\r
+ //\r
+ // Sync BSP's Mtrr table to all wakeup APs and load microcode on APs.\r
+ //\r
+ MtrrSetAllMtrrs (&PeiCpuMpData->MtrrTable);\r
+ MicrocodeDetect (PeiCpuMpData);\r
+ PeiCpuMpData->CpuData[ProcessorNumber].State = CpuStateIdle;\r
+ } else {\r
+ //\r
+ // Execute AP function if AP is not disabled\r
+ //\r
+ GetProcessorNumber (PeiCpuMpData, &ProcessorNumber);\r
+ if (PeiCpuMpData->ApLoopMode == ApInHltLoop) {\r
+ //\r
+ // Restore AP's volatile registers saved\r
+ //\r
+ RestoreVolatileRegisters (&PeiCpuMpData->CpuData[ProcessorNumber].VolatileRegisters, TRUE);\r
+ }\r
+\r
+ if ((PeiCpuMpData->CpuData[ProcessorNumber].State != CpuStateDisabled) &&\r
+ (PeiCpuMpData->ApFunction != 0)) {\r
+ PeiCpuMpData->CpuData[ProcessorNumber].State = CpuStateBusy;\r
+ Procedure = (EFI_AP_PROCEDURE)(UINTN)PeiCpuMpData->ApFunction;\r
+ //\r
+ // Invoke AP function here\r
+ //\r
+ Procedure ((VOID *)(UINTN)PeiCpuMpData->ApFunctionArgument);\r
+ //\r
+ // Re-get the processor number due to BSP/AP maybe exchange in AP function\r
+ //\r
+ GetProcessorNumber (PeiCpuMpData, &ProcessorNumber);\r
+ PeiCpuMpData->CpuData[ProcessorNumber].State = CpuStateIdle;\r
+ }\r
}\r
+\r
//\r
- // Sync BSP's Mtrr table to all wakeup APs and load microcode on APs.\r
- //\r
- MtrrSetAllMtrrs (&PeiCpuMpData->MtrrTable);\r
- MicrocodeDetect ();\r
- PeiCpuMpData->CpuData[ProcessorNumber].State = CpuStateIdle;\r
- } else {\r
- //\r
- // Execute AP function if AP is not disabled\r
+ // AP finished executing C code\r
//\r
- GetProcessorNumber (PeiCpuMpData, &ProcessorNumber);\r
+ InterlockedIncrement ((UINT32 *)&PeiCpuMpData->FinishedCount);\r
+\r
//\r
- // Restore AP's volatile registers saved\r
+ // Place AP is specified loop mode\r
//\r
- RestoreVolatileRegisters (&PeiCpuMpData->CpuData[ProcessorNumber].VolatileRegisters, TRUE);\r
+ if (PeiCpuMpData->ApLoopMode == ApInHltLoop) {\r
+ //\r
+ // Save AP volatile registers\r
+ //\r
+ SaveVolatileRegisters (&PeiCpuMpData->CpuData[ProcessorNumber].VolatileRegisters);\r
+ //\r
+ // Place AP in Hlt-loop\r
+ //\r
+ while (TRUE) {\r
+ DisableInterrupts ();\r
+ CpuSleep ();\r
+ CpuPause ();\r
+ }\r
+ }\r
+ ApStartupSignalBuffer = PeiCpuMpData->CpuData[ProcessorNumber].StartupApSignal;\r
+ while (TRUE) {\r
+ DisableInterrupts ();\r
+ if (PeiCpuMpData->ApLoopMode == ApInMwaitLoop) {\r
+ //\r
+ // Place AP in Mwait-loop\r
+ //\r
+ AsmMonitor ((UINTN)ApStartupSignalBuffer, 0, 0);\r
+ if (*ApStartupSignalBuffer != WAKEUP_AP_SIGNAL) {\r
+ //\r
+ // If AP start-up signal is not set, place AP into\r
+ // the maximum C-state\r
+ //\r
+ AsmMwait (PeiCpuMpData->ApTargetCState << 4, 0);\r
+ }\r
+ } else if (PeiCpuMpData->ApLoopMode == ApInRunLoop) {\r
+ //\r
+ // Place AP in Run-loop\r
+ //\r
+ CpuPause ();\r
+ } else {\r
+ ASSERT (FALSE);\r
+ }\r
\r
- if ((PeiCpuMpData->CpuData[ProcessorNumber].State != CpuStateDisabled) &&\r
- (PeiCpuMpData->ApFunction != 0)) {\r
- PeiCpuMpData->CpuData[ProcessorNumber].State = CpuStateBusy;\r
- Procedure = (EFI_AP_PROCEDURE)(UINTN)PeiCpuMpData->ApFunction;\r
- Procedure ((VOID *)(UINTN)PeiCpuMpData->ApFunctionArgument);\r
- PeiCpuMpData->CpuData[ProcessorNumber].State = CpuStateIdle;\r
+ //\r
+ // If AP start-up signal is written, AP is waken up\r
+ // otherwise place AP in loop again\r
+ //\r
+ if (*ApStartupSignalBuffer == WAKEUP_AP_SIGNAL) {\r
+ //\r
+ // Clear AP start-up signal when AP waken up\r
+ //\r
+ InterlockedCompareExchange32 (\r
+ (UINT32 *)ApStartupSignalBuffer,\r
+ WAKEUP_AP_SIGNAL,\r
+ 0\r
+ );\r
+ break;\r
+ }\r
}\r
}\r
+}\r
\r
- //\r
- // AP finished executing C code\r
- //\r
- InterlockedIncrement ((UINT32 *)&PeiCpuMpData->FinishedCount);\r
+/**\r
+ Write AP start-up signal to wakeup AP.\r
\r
+ @param ApStartupSignalBuffer Pointer to AP wakeup signal\r
+**/\r
+VOID\r
+WriteStartupSignal (\r
+ IN volatile UINT32 *ApStartupSignalBuffer\r
+ )\r
+{\r
+ *ApStartupSignalBuffer = WAKEUP_AP_SIGNAL;\r
//\r
- // Save AP volatile registers\r
+ // If AP is waken up, StartupApSignal should be cleared.\r
+ // Otherwise, write StartupApSignal again till AP waken up.\r
//\r
- SaveVolatileRegisters (&PeiCpuMpData->CpuData[ProcessorNumber].VolatileRegisters);\r
-\r
- AsmCliHltLoop ();\r
+ while (InterlockedCompareExchange32 (\r
+ (UINT32 *)ApStartupSignalBuffer,\r
+ WAKEUP_AP_SIGNAL,\r
+ WAKEUP_AP_SIGNAL\r
+ ) != 0) {\r
+ CpuPause ();\r
+ }\r
}\r
\r
/**\r
@param PeiCpuMpData Pointer to PEI CPU MP Data\r
@param Broadcast TRUE: Send broadcast IPI to all APs\r
FALSE: Send IPI to AP by ApicId\r
- @param ApicId Apic ID for the processor to be waked\r
+ @param ProcessorNumber The handle number of specified processor\r
@param Procedure The function to be invoked by AP\r
@param ProcedureArgument The argument to be passed into AP function\r
**/\r
WakeUpAP (\r
IN PEI_CPU_MP_DATA *PeiCpuMpData,\r
IN BOOLEAN Broadcast,\r
- IN UINT32 ApicId,\r
+ IN UINTN ProcessorNumber,\r
IN EFI_AP_PROCEDURE Procedure, OPTIONAL\r
IN VOID *ProcedureArgument OPTIONAL\r
)\r
{\r
volatile MP_CPU_EXCHANGE_INFO *ExchangeInfo;\r
+ UINTN Index;\r
\r
PeiCpuMpData->ApFunction = (UINTN) Procedure;\r
PeiCpuMpData->ApFunctionArgument = (UINTN) ProcedureArgument;\r
ExchangeInfo->PmodeOffset = PeiCpuMpData->AddressMap.PModeEntryOffset;\r
ExchangeInfo->LmodeOffset = PeiCpuMpData->AddressMap.LModeEntryOffset;\r
ExchangeInfo->Cr3 = AsmReadCr3 ();\r
+ ExchangeInfo->CodeSegment = AsmReadCs ();\r
+ ExchangeInfo->DataSegment = AsmReadDs ();\r
ExchangeInfo->CFunction = (UINTN) ApCFunction;\r
ExchangeInfo->NumApsExecuting = 0;\r
ExchangeInfo->PeiCpuMpData = PeiCpuMpData;\r
//\r
// Get the BSP's data of GDT and IDT\r
//\r
- CopyMem ((VOID *)&ExchangeInfo->GdtrProfile, &mGdt, sizeof(mGdt));\r
+ AsmReadGdtr ((IA32_DESCRIPTOR *) &ExchangeInfo->GdtrProfile);\r
AsmReadIdtr ((IA32_DESCRIPTOR *) &ExchangeInfo->IdtrProfile);\r
\r
- if (Broadcast) {\r
- SendInitSipiSipiAllExcludingSelf ((UINT32) ExchangeInfo->BufferStart);\r
- } else {\r
- SendInitSipiSipi (ApicId, (UINT32) ExchangeInfo->BufferStart);\r
+ if (PeiCpuMpData->ApLoopMode == ApInMwaitLoop) {\r
+ //\r
+ // Get AP target C-state each time when waking up AP,\r
+ // for it maybe updated by platform again\r
+ //\r
+ PeiCpuMpData->ApTargetCState = PcdGet8 (PcdCpuApTargetCstate);\r
}\r
\r
+ //\r
+ // Wakeup APs per AP loop state\r
+ //\r
+ if (PeiCpuMpData->ApLoopMode == ApInHltLoop || PeiCpuMpData->InitFlag) {\r
+ if (Broadcast) {\r
+ SendInitSipiSipiAllExcludingSelf ((UINT32) ExchangeInfo->BufferStart);\r
+ } else {\r
+ SendInitSipiSipi (\r
+ PeiCpuMpData->CpuData[ProcessorNumber].ApicId,\r
+ (UINT32) ExchangeInfo->BufferStart\r
+ );\r
+ }\r
+ } else if ((PeiCpuMpData->ApLoopMode == ApInMwaitLoop) ||\r
+ (PeiCpuMpData->ApLoopMode == ApInRunLoop)) {\r
+ if (Broadcast) {\r
+ for (Index = 0; Index < PeiCpuMpData->CpuCount; Index++) {\r
+ if (Index != PeiCpuMpData->BspNumber) {\r
+ WriteStartupSignal (PeiCpuMpData->CpuData[Index].StartupApSignal);\r
+ }\r
+ }\r
+ } else {\r
+ WriteStartupSignal (PeiCpuMpData->CpuData[ProcessorNumber].StartupApSignal);\r
+ }\r
+ } else {\r
+ ASSERT (FALSE);\r
+ }\r
return ;\r
}\r
\r
//\r
// Load Microcode on BSP\r
//\r
- MicrocodeDetect ();\r
+ MicrocodeDetect (PeiCpuMpData);\r
//\r
// Store BSP's MTRR setting\r
//\r
if (PeiCpuMpData->X2ApicEnable) {\r
DEBUG ((EFI_D_INFO, "Force x2APIC mode!\n"));\r
//\r
- // Send 2nd broadcast IPI to all APs to enable x2APIC mode\r
+ // Wakeup all APs to enable x2APIC mode\r
//\r
WakeUpAP (PeiCpuMpData, TRUE, 0, ApFuncEnableX2Apic, NULL);\r
//\r
UINTN WakeupBuffer;\r
UINTN WakeupBufferSize;\r
MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r
+ UINT8 ApLoopMode;\r
+ UINT16 MonitorFilterSize;\r
+ UINT8 *MonitorBuffer;\r
+ UINTN Index;\r
\r
AsmGetAddressMap (&AddressMap);\r
WakeupBufferSize = AddressMap.RendezvousFunnelSize + sizeof (MP_CPU_EXCHANGE_INFO);\r
DEBUG ((EFI_D_INFO, "CpuMpPei: WakeupBuffer = 0x%x\n", WakeupBuffer));\r
\r
//\r
- // Allocate Pages for APs stack, CPU MP Data and backup buffer for wakeup buffer\r
+ // Allocate Pages for APs stack, CPU MP Data, backup buffer for wakeup buffer,\r
+ // and monitor buffer if required.\r
//\r
MaxCpuCount = PcdGet32(PcdCpuMaxLogicalProcessorNumber);\r
BufferSize = PcdGet32 (PcdCpuApStackSize) * MaxCpuCount + sizeof (PEI_CPU_MP_DATA)\r
+ WakeupBufferSize + sizeof (PEI_CPU_DATA) * MaxCpuCount;\r
+ ApLoopMode = GetApLoopMode (&MonitorFilterSize);\r
+ BufferSize += MonitorFilterSize * MaxCpuCount;\r
Status = PeiServicesAllocatePages (\r
EfiBootServicesData,\r
EFI_SIZE_TO_PAGES (BufferSize),\r
InitializeSpinLock(&PeiCpuMpData->MpLock);\r
SaveVolatileRegisters (&PeiCpuMpData->CpuData[0].VolatileRegisters);\r
CopyMem (&PeiCpuMpData->AddressMap, &AddressMap, sizeof (MP_ASSEMBLY_ADDRESS_MAP));\r
-\r
+ //\r
+ // Initialize AP loop mode\r
+ //\r
+ PeiCpuMpData->ApLoopMode = ApLoopMode;\r
+ DEBUG ((EFI_D_INFO, "AP Loop Mode is %d\n", PeiCpuMpData->ApLoopMode));\r
+ MonitorBuffer = (UINT8 *)(PeiCpuMpData->CpuData + MaxCpuCount);\r
+ if (PeiCpuMpData->ApLoopMode != ApInHltLoop) {\r
+ //\r
+ // Set up APs wakeup signal buffer\r
+ //\r
+ for (Index = 0; Index < MaxCpuCount; Index++) {\r
+ PeiCpuMpData->CpuData[Index].StartupApSignal = \r
+ (UINT32 *)(MonitorBuffer + MonitorFilterSize * Index);\r
+ }\r
+ }\r
//\r
// Backup original data and copy AP reset code in it\r
//\r
EFI_PEI_HOB_POINTERS Hob;\r
EFI_HOB_MEMORY_ALLOCATION *MemoryHob;\r
\r
- DEBUG ((EFI_D_INFO, "CpuMpPei: CpuMpEndOfPeiCallback () invokded\n"));\r
+ DEBUG ((EFI_D_INFO, "CpuMpPei: CpuMpEndOfPeiCallback () invoked\n"));\r
\r
Status = PeiServicesGetBootMode (&BootMode);\r
ASSERT_EFI_ERROR (Status);\r
IN CONST EFI_PEI_SERVICES **PeiServices\r
)\r
{\r
- EFI_STATUS Status;\r
- PEI_CPU_MP_DATA *PeiCpuMpData;\r
- UINT32 ProcessorCount;\r
+ EFI_STATUS Status;\r
+ PEI_CPU_MP_DATA *PeiCpuMpData;\r
+ EFI_VECTOR_HANDOFF_INFO *VectorInfo;\r
+ EFI_PEI_VECTOR_HANDOFF_INFO_PPI *VectorHandoffInfoPpi;\r
\r
//\r
- // Load new GDT table on BSP\r
+ // Get Vector Hand-off Info PPI\r
//\r
- AsmInitializeGdt (&mGdt);\r
+ VectorInfo = NULL;\r
+ Status = PeiServicesLocatePpi (\r
+ &gEfiVectorHandoffInfoPpiGuid,\r
+ 0,\r
+ NULL,\r
+ (VOID **)&VectorHandoffInfoPpi\r
+ );\r
+ if (Status == EFI_SUCCESS) {\r
+ VectorInfo = VectorHandoffInfoPpi->Info;\r
+ }\r
+ Status = InitializeCpuExceptionHandlers (VectorInfo);\r
+ ASSERT_EFI_ERROR (Status);\r
//\r
// Get wakeup buffer and copy AP reset code in it\r
//\r
//\r
// Count processor number and collect processor information\r
//\r
- ProcessorCount = CountProcessorNumber (PeiCpuMpData);\r
+ CountProcessorNumber (PeiCpuMpData);\r
//\r
// Build location of PEI CPU MP DATA buffer in HOB\r
//\r
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