/** @file\r
Definitions to install Multiple Processor PPI.\r
\r
- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
#include <Ppi/SecPlatformInformation.h>\r
#include <Ppi/SecPlatformInformation2.h>\r
#include <Ppi/EndOfPeiPhase.h>\r
+#include <Ppi/VectorHandoffInfo.h>\r
\r
+#include <Register/Cpuid.h>\r
#include <Register/LocalApic.h>\r
\r
#include <Library/BaseLib.h>\r
#include <Library/SynchronizationLib.h>\r
#include <Library/TimerLib.h>\r
#include <Library/UefiCpuLib.h>\r
+#include <Library/CpuLib.h>\r
+#include <Library/CpuExceptionHandlerLib.h>\r
\r
#include "Microcode.h"\r
\r
CpuStateDisabled\r
} CPU_STATE;\r
\r
+#define WAKEUP_AP_SIGNAL SIGNATURE_32 ('S', 'T', 'A', 'P')\r
+\r
+typedef enum {\r
+ ApInHltLoop = 1,\r
+ ApInMwaitLoop = 2,\r
+ ApInRunLoop = 3\r
+} AP_LOOP_MODE;\r
+\r
//\r
// AP reset code information\r
//\r
\r
typedef struct _PEI_CPU_MP_DATA PEI_CPU_MP_DATA;\r
\r
-#pragma pack()\r
+#pragma pack(1)\r
\r
typedef union {\r
struct {\r
\r
//\r
// MP CPU exchange information for AP reset code\r
+// This structure is required to be packed because fixed field offsets\r
+// into this structure are used in assembly code in this module\r
//\r
typedef struct {\r
UINTN Lock;\r
UINTN BufferStart;\r
UINTN PmodeOffset;\r
UINTN NumApsExecuting;\r
+ UINTN CodeSegment;\r
+ UINTN DataSegment;\r
UINTN LmodeOffset;\r
UINTN Cr3;\r
PEI_CPU_MP_DATA *PeiCpuMpData;\r
#pragma pack()\r
\r
typedef struct {\r
+ UINTN Cr0;\r
+ UINTN Cr3;\r
+ UINTN Cr4;\r
+ UINTN Dr0;\r
+ UINTN Dr1;\r
+ UINTN Dr2;\r
+ UINTN Dr3;\r
+ UINTN Dr6;\r
+ UINTN Dr7;\r
+} CPU_VOLATILE_REGISTERS;\r
+\r
+typedef struct {\r
+ volatile UINT32 *StartupApSignal;\r
UINT32 ApicId;\r
EFI_HEALTH_FLAGS Health;\r
CPU_STATE State;\r
BOOLEAN CpuHealthy;\r
+ CPU_VOLATILE_REGISTERS VolatileRegisters;\r
} PEI_CPU_DATA;\r
\r
//\r
// PEI CPU MP Data save in memory\r
//\r
struct _PEI_CPU_MP_DATA {\r
+ SPIN_LOCK MpLock;\r
UINT32 CpuCount;\r
UINT32 BspNumber;\r
UINTN Buffer;\r
volatile UINT32 FinishedCount;\r
BOOLEAN EndOfPeiFlag;\r
BOOLEAN InitFlag;\r
+ BOOLEAN X2ApicEnable;\r
CPU_EXCHANGE_ROLE_INFO BSPInfo;\r
CPU_EXCHANGE_ROLE_INFO APInfo;\r
MTRR_SETTINGS MtrrTable;\r
+ UINT8 ApLoopMode;\r
+ UINT8 ApTargetCState;\r
PEI_CPU_DATA *CpuData;\r
volatile MP_CPU_EXCHANGE_INFO *MpCpuExchangeInfo;\r
};\r
IN IA32_DESCRIPTOR *Gdtr\r
);\r
\r
-/**\r
- Assembly code to do CLI-HALT loop.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-AsmCliHltLoop (\r
- VOID\r
- );\r
-\r
/**\r
Get available system memory below 1MB by specified size.\r
\r
@param PeiCpuMpData Pointer to PEI CPU MP Data\r
@param Broadcast TRUE: Send broadcast IPI to all APs\r
FALSE: Send IPI to AP by ApicId\r
- @param ApicId Apic ID for the processor to be waked\r
+ @param ProcessorNumber The handle number of specified processor\r
@param Procedure The function to be invoked by AP\r
@param ProcedureArgument The argument to be passed into AP function\r
**/\r
WakeUpAP (\r
IN PEI_CPU_MP_DATA *PeiCpuMpData,\r
IN BOOLEAN Broadcast,\r
- IN UINT32 ApicId,\r
+ IN UINTN ProcessorNumber,\r
IN EFI_AP_PROCEDURE Procedure, OPTIONAL\r
IN VOID *ProcedureArgument OPTIONAL\r
);\r
OUT EFI_SEC_PLATFORM_INFORMATION_RECORD2 *PlatformInformationRecord2\r
);\r
\r
+/**\r
+ Detect whether specified processor can find matching microcode patch and load it.\r
+\r
+ @param PeiCpuMpData Pointer to PEI CPU MP Data\r
+**/\r
+VOID\r
+MicrocodeDetect (\r
+ IN PEI_CPU_MP_DATA *PeiCpuMpData\r
+ );\r
+\r
#endif\r