-/** @file
- Definitions to install Multiple Processor PPI.
-
- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _CPU_MP_PEI_H_
-#define _CPU_MP_PEI_H_
-
-#include <PiPei.h>
-
-
-#include <Library/BaseLib.h>
-#include <Library/HobLib.h>
-#include <Library/PeimEntryPoint.h>
-
-#pragma pack(1)
-typedef union {
- struct {
- UINT32 LimitLow : 16;
- UINT32 BaseLow : 16;
- UINT32 BaseMid : 8;
- UINT32 Type : 4;
- UINT32 System : 1;
- UINT32 Dpl : 2;
- UINT32 Present : 1;
- UINT32 LimitHigh : 4;
- UINT32 Software : 1;
- UINT32 Reserved : 1;
- UINT32 DefaultSize : 1;
- UINT32 Granularity : 1;
- UINT32 BaseHigh : 8;
- } Bits;
- UINT64 Uint64;
-} IA32_GDT;
-#pragma pack()
-/**
- Assembly code to load GDT table and update segment accordingly.
-
- @param Gdtr Pointer to GDT descriptor
-**/
-VOID
-EFIAPI
-AsmInitializeGdt (
- IN IA32_DESCRIPTOR *Gdtr
- );
-
-
-#endif
+/** @file\r
+ Definitions to install Multiple Processor PPI.\r
+\r
+ Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#ifndef _CPU_MP_PEI_H_\r
+#define _CPU_MP_PEI_H_\r
+\r
+#include <PiPei.h>\r
+\r
+#include <Ppi/MpServices.h>\r
+#include <Ppi/SecPlatformInformation.h>\r
+#include <Ppi/SecPlatformInformation2.h>\r
+#include <Ppi/EndOfPeiPhase.h>\r
+\r
+#include <Register/Cpuid.h>\r
+#include <Register/LocalApic.h>\r
+\r
+#include <Library/BaseLib.h>\r
+#include <Library/BaseMemoryLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/HobLib.h>\r
+#include <Library/LocalApicLib.h>\r
+#include <Library/MtrrLib.h>\r
+#include <Library/PcdLib.h>\r
+#include <Library/PeimEntryPoint.h>\r
+#include <Library/PeiServicesLib.h>\r
+#include <Library/ReportStatusCodeLib.h>\r
+#include <Library/SynchronizationLib.h>\r
+#include <Library/TimerLib.h>\r
+#include <Library/UefiCpuLib.h>\r
+\r
+#include "Microcode.h"\r
+\r
+//\r
+// AP state\r
+//\r
+typedef enum {\r
+ CpuStateIdle,\r
+ CpuStateBusy,\r
+ CpuStateDisabled\r
+} CPU_STATE;\r
+\r
+//\r
+// AP reset code information\r
+//\r
+typedef struct {\r
+ UINT8 *RendezvousFunnelAddress;\r
+ UINTN PModeEntryOffset;\r
+ UINTN LModeEntryOffset;\r
+ UINTN RendezvousFunnelSize;\r
+} MP_ASSEMBLY_ADDRESS_MAP;\r
+\r
+//\r
+// CPU exchange information for switch BSP\r
+//\r
+typedef struct {\r
+ UINT8 State; // offset 0\r
+ UINTN StackPointer; // offset 4 / 8\r
+ IA32_DESCRIPTOR Gdtr; // offset 8 / 16\r
+ IA32_DESCRIPTOR Idtr; // offset 14 / 26\r
+} CPU_EXCHANGE_ROLE_INFO;\r
+\r
+typedef struct _PEI_CPU_MP_DATA PEI_CPU_MP_DATA;\r
+\r
+#pragma pack()\r
+\r
+typedef union {\r
+ struct {\r
+ UINT32 LimitLow : 16;\r
+ UINT32 BaseLow : 16;\r
+ UINT32 BaseMid : 8;\r
+ UINT32 Type : 4;\r
+ UINT32 System : 1;\r
+ UINT32 Dpl : 2;\r
+ UINT32 Present : 1;\r
+ UINT32 LimitHigh : 4;\r
+ UINT32 Software : 1;\r
+ UINT32 Reserved : 1;\r
+ UINT32 DefaultSize : 1;\r
+ UINT32 Granularity : 1;\r
+ UINT32 BaseHigh : 8;\r
+ } Bits;\r
+ UINT64 Uint64;\r
+} IA32_GDT;\r
+\r
+//\r
+// MP CPU exchange information for AP reset code\r
+//\r
+typedef struct {\r
+ UINTN Lock;\r
+ UINTN StackStart;\r
+ UINTN StackSize;\r
+ UINTN CFunction;\r
+ IA32_DESCRIPTOR GdtrProfile;\r
+ IA32_DESCRIPTOR IdtrProfile;\r
+ UINTN BufferStart;\r
+ UINTN PmodeOffset;\r
+ UINTN NumApsExecuting;\r
+ UINTN LmodeOffset;\r
+ UINTN Cr3;\r
+ PEI_CPU_MP_DATA *PeiCpuMpData;\r
+} MP_CPU_EXCHANGE_INFO;\r
+\r
+#pragma pack()\r
+\r
+typedef struct {\r
+ UINTN Cr0;\r
+ UINTN Cr3;\r
+ UINTN Cr4;\r
+ UINTN Dr0;\r
+ UINTN Dr1;\r
+ UINTN Dr2;\r
+ UINTN Dr3;\r
+ UINTN Dr6;\r
+ UINTN Dr7;\r
+} CPU_VOLATILE_REGISTERS;\r
+\r
+typedef struct {\r
+ UINT32 ApicId;\r
+ EFI_HEALTH_FLAGS Health;\r
+ CPU_STATE State;\r
+ BOOLEAN CpuHealthy;\r
+ CPU_VOLATILE_REGISTERS VolatileRegisters;\r
+} PEI_CPU_DATA;\r
+\r
+//\r
+// PEI CPU MP Data save in memory\r
+//\r
+struct _PEI_CPU_MP_DATA {\r
+ SPIN_LOCK MpLock;\r
+ UINT32 CpuCount;\r
+ UINT32 BspNumber;\r
+ UINTN Buffer;\r
+ UINTN CpuApStackSize;\r
+ MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r
+ UINTN WakeupBuffer;\r
+ UINTN BackupBuffer;\r
+ UINTN BackupBufferSize;\r
+ UINTN ApFunction;\r
+ UINTN ApFunctionArgument;\r
+ volatile UINT32 FinishedCount;\r
+ BOOLEAN EndOfPeiFlag;\r
+ BOOLEAN InitFlag;\r
+ BOOLEAN X2ApicEnable;\r
+ CPU_EXCHANGE_ROLE_INFO BSPInfo;\r
+ CPU_EXCHANGE_ROLE_INFO APInfo;\r
+ MTRR_SETTINGS MtrrTable;\r
+ PEI_CPU_DATA *CpuData;\r
+ volatile MP_CPU_EXCHANGE_INFO *MpCpuExchangeInfo;\r
+};\r
+extern EFI_PEI_PPI_DESCRIPTOR mPeiCpuMpPpiDesc;\r
+\r
+\r
+/**\r
+ Assembly code to get starting address and size of the rendezvous entry for APs.\r
+ Information for fixing a jump instruction in the code is also returned.\r
+\r
+ @param AddressMap Output buffer for address map information.\r
+**/\r
+VOID\r
+EFIAPI\r
+AsmGetAddressMap (\r
+ OUT MP_ASSEMBLY_ADDRESS_MAP *AddressMap\r
+ );\r
+\r
+/**\r
+ Assembly code to load GDT table and update segment accordingly.\r
+\r
+ @param Gdtr Pointer to GDT descriptor\r
+**/\r
+VOID\r
+EFIAPI\r
+AsmInitializeGdt (\r
+ IN IA32_DESCRIPTOR *Gdtr\r
+ );\r
+\r
+/**\r
+ Assembly code to do CLI-HALT loop.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+AsmCliHltLoop (\r
+ VOID\r
+ );\r
+\r
+/**\r
+ Get available system memory below 1MB by specified size.\r
+\r
+ @param PeiCpuMpData Pointer to PEI CPU MP Data\r
+**/\r
+VOID\r
+BackupAndPrepareWakeupBuffer(\r
+ IN PEI_CPU_MP_DATA *PeiCpuMpData\r
+ );\r
+\r
+/**\r
+ Restore wakeup buffer data.\r
+\r
+ @param PeiCpuMpData Pointer to PEI CPU MP Data\r
+**/\r
+VOID\r
+RestoreWakeupBuffer(\r
+ IN PEI_CPU_MP_DATA *PeiCpuMpData\r
+ );\r
+\r
+/**\r
+ Notify function on End Of Pei PPI.\r
+\r
+ On S3 boot, this function will restore wakeup buffer data.\r
+ On normal boot, this function will flag wakeup buffer to be un-used type.\r
+\r
+ @param PeiServices The pointer to the PEI Services Table.\r
+ @param NotifyDescriptor Address of the notification descriptor data structure.\r
+ @param Ppi Address of the PPI that was installed.\r
+\r
+ @retval EFI_SUCCESS When everything is OK.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+CpuMpEndOfPeiCallback (\r
+ IN EFI_PEI_SERVICES **PeiServices,\r
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,\r
+ IN VOID *Ppi\r
+ );\r
+\r
+/**\r
+ This function will be called by BSP to wakeup AP.\r
+\r
+ @param PeiCpuMpData Pointer to PEI CPU MP Data\r
+ @param Broadcast TRUE: Send broadcast IPI to all APs\r
+ FALSE: Send IPI to AP by ApicId\r
+ @param ApicId Apic ID for the processor to be waked\r
+ @param Procedure The function to be invoked by AP\r
+ @param ProcedureArgument The argument to be passed into AP function\r
+**/\r
+VOID\r
+WakeUpAP (\r
+ IN PEI_CPU_MP_DATA *PeiCpuMpData,\r
+ IN BOOLEAN Broadcast,\r
+ IN UINT32 ApicId,\r
+ IN EFI_AP_PROCEDURE Procedure, OPTIONAL\r
+ IN VOID *ProcedureArgument OPTIONAL\r
+ );\r
+\r
+/**\r
+ Get CPU MP Data pointer from the Guided HOB.\r
+\r
+ @return Pointer to Pointer to PEI CPU MP Data\r
+**/\r
+PEI_CPU_MP_DATA *\r
+GetMpHobData (\r
+ VOID\r
+ );\r
+\r
+/**\r
+ Find the current Processor number by APIC ID.\r
+\r
+ @param PeiCpuMpData Pointer to PEI CPU MP Data\r
+ @param ProcessorNumber Return the pocessor number found\r
+\r
+ @retval EFI_SUCCESS ProcessorNumber is found and returned.\r
+ @retval EFI_NOT_FOUND ProcessorNumber is not found.\r
+**/\r
+EFI_STATUS\r
+GetProcessorNumber (\r
+ IN PEI_CPU_MP_DATA *PeiCpuMpData,\r
+ OUT UINTN *ProcessorNumber\r
+ );\r
+\r
+/**\r
+ Collects BIST data from PPI.\r
+\r
+ This function collects BIST data from Sec Platform Information2 PPI\r
+ or SEC Platform Information PPI.\r
+\r
+ @param PeiServices Pointer to PEI Services Table\r
+ @param PeiCpuMpData Pointer to PEI CPU MP Data\r
+\r
+**/\r
+VOID\r
+CollectBistDataFromPpi (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN PEI_CPU_MP_DATA *PeiCpuMpData\r
+ );\r
+\r
+/**\r
+ Implementation of the PlatformInformation2 service in EFI_SEC_PLATFORM_INFORMATION2_PPI.\r
+\r
+ @param PeiServices The pointer to the PEI Services Table.\r
+ @param StructureSize The pointer to the variable describing size of the input buffer.\r
+ @param PlatformInformationRecord2 The pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD2.\r
+\r
+ @retval EFI_SUCCESS The data was successfully returned.\r
+ @retval EFI_BUFFER_TOO_SMALL The buffer was too small. The current buffer size needed to\r
+ hold the record is returned in StructureSize.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+SecPlatformInformation2 (\r
+ IN CONST EFI_PEI_SERVICES **PeiServices,\r
+ IN OUT UINT64 *StructureSize,\r
+ OUT EFI_SEC_PLATFORM_INFORMATION_RECORD2 *PlatformInformationRecord2\r
+ );\r
+\r
+#endif\r
projects / mirror_edk2.git / blobdiff