/** @file\r
Definitions to install Multiple Processor PPI.\r
\r
- Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
#include <Ppi/SecPlatformInformation.h>\r
#include <Ppi/SecPlatformInformation2.h>\r
#include <Ppi/EndOfPeiPhase.h>\r
+#include <Ppi/VectorHandoffInfo.h>\r
\r
#include <Register/Cpuid.h>\r
#include <Register/LocalApic.h>\r
+#include <Register/Msr.h>\r
\r
#include <Library/BaseLib.h>\r
#include <Library/BaseMemoryLib.h>\r
#include <Library/SynchronizationLib.h>\r
#include <Library/TimerLib.h>\r
#include <Library/UefiCpuLib.h>\r
+#include <Library/CpuLib.h>\r
+#include <Library/CpuExceptionHandlerLib.h>\r
+#include <Library/MpInitLib.h>\r
\r
#include "Microcode.h"\r
\r
CpuStateDisabled\r
} CPU_STATE;\r
\r
+#define WAKEUP_AP_SIGNAL SIGNATURE_32 ('S', 'T', 'A', 'P')\r
+\r
+typedef enum {\r
+ ApInHltLoop = 1,\r
+ ApInMwaitLoop = 2,\r
+ ApInRunLoop = 3\r
+} AP_LOOP_MODE;\r
+\r
//\r
// AP reset code information\r
//\r
typedef struct {\r
UINT8 *RendezvousFunnelAddress;\r
- UINTN PModeEntryOffset;\r
- UINTN LModeEntryOffset;\r
+ UINTN ModeEntryOffset;\r
UINTN RendezvousFunnelSize;\r
} MP_ASSEMBLY_ADDRESS_MAP;\r
\r
\r
#pragma pack(1)\r
\r
-typedef union {\r
- struct {\r
- UINT32 LimitLow : 16;\r
- UINT32 BaseLow : 16;\r
- UINT32 BaseMid : 8;\r
- UINT32 Type : 4;\r
- UINT32 System : 1;\r
- UINT32 Dpl : 2;\r
- UINT32 Present : 1;\r
- UINT32 LimitHigh : 4;\r
- UINT32 Software : 1;\r
- UINT32 Reserved : 1;\r
- UINT32 DefaultSize : 1;\r
- UINT32 Granularity : 1;\r
- UINT32 BaseHigh : 8;\r
- } Bits;\r
- UINT64 Uint64;\r
-} IA32_GDT;\r
-\r
//\r
// MP CPU exchange information for AP reset code\r
// This structure is required to be packed because fixed field offsets\r
IA32_DESCRIPTOR GdtrProfile;\r
IA32_DESCRIPTOR IdtrProfile;\r
UINTN BufferStart;\r
- UINTN PmodeOffset;\r
+ UINTN ModeOffset;\r
UINTN NumApsExecuting;\r
- UINTN LmodeOffset;\r
+ UINTN CodeSegment;\r
+ UINTN DataSegment;\r
UINTN Cr3;\r
PEI_CPU_MP_DATA *PeiCpuMpData;\r
} MP_CPU_EXCHANGE_INFO;\r
} CPU_VOLATILE_REGISTERS;\r
\r
typedef struct {\r
+ volatile UINT32 *StartupApSignal;\r
UINT32 ApicId;\r
EFI_HEALTH_FLAGS Health;\r
CPU_STATE State;\r
CPU_EXCHANGE_ROLE_INFO BSPInfo;\r
CPU_EXCHANGE_ROLE_INFO APInfo;\r
MTRR_SETTINGS MtrrTable;\r
+ UINT8 ApLoopMode;\r
+ UINT8 ApTargetCState;\r
PEI_CPU_DATA *CpuData;\r
volatile MP_CPU_EXCHANGE_INFO *MpCpuExchangeInfo;\r
};\r
IN IA32_DESCRIPTOR *Gdtr\r
);\r
\r
-/**\r
- Assembly code to do CLI-HALT loop.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-AsmCliHltLoop (\r
- VOID\r
- );\r
-\r
/**\r
Get available system memory below 1MB by specified size.\r
\r
@param PeiCpuMpData Pointer to PEI CPU MP Data\r
**/\r
+STATIC\r
VOID\r
BackupAndPrepareWakeupBuffer(\r
IN PEI_CPU_MP_DATA *PeiCpuMpData\r
\r
@param PeiCpuMpData Pointer to PEI CPU MP Data\r
**/\r
+STATIC\r
VOID\r
RestoreWakeupBuffer(\r
IN PEI_CPU_MP_DATA *PeiCpuMpData\r
@retval EFI_SUCCESS When everything is OK.\r
\r
**/\r
+STATIC\r
EFI_STATUS\r
EFIAPI\r
CpuMpEndOfPeiCallback (\r
@param PeiCpuMpData Pointer to PEI CPU MP Data\r
@param Broadcast TRUE: Send broadcast IPI to all APs\r
FALSE: Send IPI to AP by ApicId\r
- @param ApicId Apic ID for the processor to be waked\r
+ @param ProcessorNumber The handle number of specified processor\r
@param Procedure The function to be invoked by AP\r
@param ProcedureArgument The argument to be passed into AP function\r
**/\r
+STATIC\r
VOID\r
WakeUpAP (\r
IN PEI_CPU_MP_DATA *PeiCpuMpData,\r
IN BOOLEAN Broadcast,\r
- IN UINT32 ApicId,\r
+ IN UINTN ProcessorNumber,\r
IN EFI_AP_PROCEDURE Procedure, OPTIONAL\r
IN VOID *ProcedureArgument OPTIONAL\r
);\r
@retval EFI_SUCCESS ProcessorNumber is found and returned.\r
@retval EFI_NOT_FOUND ProcessorNumber is not found.\r
**/\r
+STATIC\r
EFI_STATUS\r
GetProcessorNumber (\r
IN PEI_CPU_MP_DATA *PeiCpuMpData,\r
or SEC Platform Information PPI.\r
\r
@param PeiServices Pointer to PEI Services Table\r
- @param PeiCpuMpData Pointer to PEI CPU MP Data\r
\r
**/\r
VOID\r
CollectBistDataFromPpi (\r
- IN CONST EFI_PEI_SERVICES **PeiServices,\r
- IN PEI_CPU_MP_DATA *PeiCpuMpData\r
+ IN CONST EFI_PEI_SERVICES **PeiServices\r
);\r
\r
/**\r
OUT EFI_SEC_PLATFORM_INFORMATION_RECORD2 *PlatformInformationRecord2\r
);\r
\r
+/**\r
+ Detect whether specified processor can find matching microcode patch and load it.\r
+\r
+ @param PeiCpuMpData Pointer to PEI CPU MP Data\r
+**/\r
+VOID\r
+MicrocodeDetect (\r
+ IN PEI_CPU_MP_DATA *PeiCpuMpData\r
+ );\r
+\r
#endif\r