// According to IA32 SDM, MTRRs number and msr offset are always consistent\r
// for IA32 processor family\r
//\r
-#define MTRR_NUMBER_OF_VARIABLE_MTRR 8\r
+\r
+//\r
+// We can not use Pcd as macro to define structure, so we have to define MAX_MTRR_NUMBER_OF_VARIABLE_MTRR\r
+//\r
+#define MAX_MTRR_NUMBER_OF_VARIABLE_MTRR 32\r
+//\r
+// Firmware need reserve 2 MTRR for OS\r
+//\r
+#define RESERVED_FIRMWARE_VARIABLE_MTRR_NUMBER 2\r
+\r
#define MTRR_NUMBER_OF_FIXED_MTRR 11\r
-#define FIRMWARE_VARIABLE_MTRR_NUMBER 6\r
+#define MTRR_LIB_IA32_MTRR_CAP 0x0FE\r
+#define MTRR_LIB_IA32_MTRR_CAP_VCNT_MASK 0x0FF\r
#define MTRR_LIB_IA32_MTRR_FIX64K_00000 0x250\r
#define MTRR_LIB_IA32_MTRR_FIX16K_80000 0x258\r
#define MTRR_LIB_IA32_MTRR_FIX16K_A0000 0x259\r
#define MTRR_LIB_IA32_MTRR_FIX4K_F0000 0x26E\r
#define MTRR_LIB_IA32_MTRR_FIX4K_F8000 0x26F\r
#define MTRR_LIB_IA32_VARIABLE_MTRR_BASE 0x200\r
-#define MTRR_LIB_IA32_VARIABLE_MTRR_END 0x20F\r
#define MTRR_LIB_IA32_MTRR_DEF_TYPE 0x2FF\r
#define MTRR_LIB_MSR_VALID_MASK 0xFFFFFFFFFULL\r
#define MTRR_LIB_CACHE_VALID_ADDRESS 0xFFFFFF000ULL\r
// Array for variable MTRRs\r
//\r
typedef struct _MTRR_VARIABLE_SETTINGS_ {\r
- MTRR_VARIABLE_SETTING Mtrr[MTRR_NUMBER_OF_VARIABLE_MTRR];\r
+ MTRR_VARIABLE_SETTING Mtrr[MAX_MTRR_NUMBER_OF_VARIABLE_MTRR];\r
} MTRR_VARIABLE_SETTINGS;\r
\r
//\r
#define MTRR_CACHE_WRITE_BACK 6\r
#define MTRR_CACHE_INVALID_TYPE 7\r
\r
+/**\r
+ Returns the variable MTRR count for the CPU.\r
+\r
+ @return Variable MTRR count\r
+\r
+**/\r
+UINT32\r
+GetVariableMtrrCount (\r
+ VOID\r
+ );\r
+\r
+/**\r
+ Returns the firmware usable variable MTRR count for the CPU.\r
+\r
+ @return Firmware usable variable MTRR count\r
+\r
+**/\r
+UINT32\r
+GetFirmwareVariableMtrrCount (\r
+ VOID\r
+ );\r
+\r
/**\r
This function attempts to set the attributes for a memory range.\r
\r
This function shadows the content of variable MTRRs into\r
an internal array: VariableMtrr\r
\r
- @param MtrrValidBitsMask The mask for the valid bit of the MTRR\r
- @param MtrrValidAddressMask The valid address mask for MTRR since the base address in\r
- MTRR must align to 4K, so valid address mask equal to\r
- MtrrValidBitsMask & 0xfffffffffffff000ULL\r
- @param VariableMtrr The array to shadow variable MTRRs content\r
- @return The ruturn value of this paramter indicates the number of\r
- MTRRs which has been used.\r
+ @param MtrrValidBitsMask The mask for the valid bit of the MTRR\r
+ @param MtrrValidAddressMask The valid address mask for MTRR since the base address in\r
+ MTRR must align to 4K, so valid address mask equal to\r
+ MtrrValidBitsMask & 0xfffffffffffff000ULL\r
+ @param VariableMtrrCount On input, it means the array number of variable MTRRs passed in.\r
+ On output, it means the number of MTRRs which has been used if EFI_SUCCESS,\r
+ or the number of MTRR required if BUFFER_TOO_SMALL.\r
+ @param VariableMtrr The array to shadow variable MTRRs content\r
+\r
+ @retval RETURN_SUCCESS The variable MTRRs are returned.\r
+ @retval RETURN_BUFFER_TOO_SMALL The input buffer is too small to hold the variable MTRRs.\r
+\r
**/\r
-UINT32\r
+RETURN_STATUS\r
EFIAPI\r
MtrrGetMemoryAttributeInVariableMtrr (\r
IN UINT64 MtrrValidBitsMask,\r
IN UINT64 MtrrValidAddressMask,\r
+ IN OUT UINT32 *VariableMtrrCount,\r
OUT VARIABLE_MTRR *VariableMtrr\r
);\r
\r