UefiCpuPkg/Include/Register/Msr/SkylakeMsr.h: Add new MSR name and keep old one.

[mirror_edk2.git] / UefiCpuPkg / Include / Register / Msr / SkylakeMsr.h

diff --git a/UefiCpuPkg/Include/Register/Msr/SkylakeMsr.h b/UefiCpuPkg/Include/Register/Msr/SkylakeMsr.h
index a85997f3e9acbe23883ed67d4ed95de5ec570711..a24480015e2736b71109971c8585f3ac4789cd8f 100644 (file)
--- a/UefiCpuPkg/Include/Register/Msr/SkylakeMsr.h
+++ b/UefiCpuPkg/Include/Register/Msr/SkylakeMsr.h
@@ -197,10 +197,12 @@ typedef union {
 \r
 \r
 /**\r
-  Package. Lower 64 Bit OwnerEpoch Component of SGX Key (RO). Low 64 bits of\r
-  an 128-bit external entropy value for key derivation of an enclave.\r
+  Package. Lower 64 Bit CR_SGXOWNEREPOCH (W) Writes do not update\r
+  CR_SGXOWNEREPOCH if CPUID.(EAX=12H, ECX=0):EAX.SGX1 is 1 on any thread in\r
+  the package. Lower 64 bits of an 128-bit external entropy value for key\r
+  derivation of an enclave.\r
 \r
-  @param  ECX  MSR_SKYLAKE_SGXOWNER0 (0x00000300)\r
+  @param  ECX  MSR_SKYLAKE_SGXOWNEREPOCH0 (0x00000300)\r
   @param  EAX  Lower 32-bits of MSR value.\r
   @param  EDX  Upper 32-bits of MSR value.\r
 \r
@@ -208,18 +210,24 @@ typedef union {
   @code\r
   UINT64  Msr;\r
 \r
-  Msr = AsmReadMsr64 (MSR_SKYLAKE_SGXOWNER0);\r
+  Msr = 0;\r
+  AsmWriteMsr64 (MSR_SKYLAKE_SGXOWNEREPOCH0, Msr);\r
   @endcode\r
-  @note MSR_SKYLAKE_SGXOWNER0 is defined as MSR_SGXOWNER0 in SDM.\r
+  @note MSR_SKYLAKE_SGXOWNEREPOCH0 is defined as MSR_SGXOWNER0 in SDM.\r
 **/\r
-#define MSR_SKYLAKE_SGXOWNER0                    0x00000300\r
-\r
+#define MSR_SKYLAKE_SGXOWNEREPOCH0                    0x00000300\r
 \r
+//\r
+// Define MSR_SKYLAKE_SGXOWNER0 for compatibility due to name change in the SDM.\r
+//\r
+#define MSR_SKYLAKE_SGXOWNER0                         MSR_SKYLAKE_SGXOWNEREPOCH0\r
 /**\r
-  Package. Upper 64 Bit OwnerEpoch Component of SGX Key (RO). Upper 64 bits of\r
-  an 128-bit external entropy value for key derivation of an enclave.\r
+  Package. Upper 64 Bit CR_SGXOWNEREPOCH (W) Writes do not update\r
+  CR_SGXOWNEREPOCH if CPUID.(EAX=12H, ECX=0):EAX.SGX1 is 1 on any thread in\r
+  the package. Upper 64 bits of an 128-bit external entropy value for key\r
+  derivation of an enclave.\r
 \r
-  @param  ECX  MSR_SKYLAKE_SGXOWNER1 (0x00000301)\r
+  @param  ECX  MSR_SKYLAKE_SGXOWNEREPOCH1 (0x00000301)\r
   @param  EAX  Lower 32-bits of MSR value.\r
   @param  EDX  Upper 32-bits of MSR value.\r
 \r
@@ -227,11 +235,17 @@ typedef union {
   @code\r
   UINT64  Msr;\r
 \r
-  Msr = AsmReadMsr64 (MSR_SKYLAKE_SGXOWNER1);\r
+  Msr = 0;\r
+  AsmWriteMsr64 (MSR_SKYLAKE_SGXOWNEREPOCH1, Msr);\r
   @endcode\r
-  @note MSR_SKYLAKE_SGXOWNER1 is defined as MSR_SGXOWNER1 in SDM.\r
+  @note MSR_SKYLAKE_SGXOWNEREPOCH1 is defined as MSR_SGXOWNER1 in SDM.\r
 **/\r
-#define MSR_SKYLAKE_SGXOWNER1                    0x00000301\r
+#define MSR_SKYLAKE_SGXOWNEREPOCH1                0x00000301\r
+\r
+//\r
+// Define MSR_SKYLAKE_SGXOWNER1 for compatibility due to name change in the SDM.\r
+//\r
+#define MSR_SKYLAKE_SGXOWNER1                     MSR_SKYLAKE_SGXOWNEREPOCH1\r
 \r
 \r
 /**\r