;------------------------------------------------------------------------------\r
;*\r
-;* Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>\r
-;* This program and the accompanying materials\r
-;* are licensed and made available under the terms and conditions of the BSD License\r
-;* which accompanies this distribution. The full text of the license may be found at\r
-;* http://opensource.org/licenses/bsd-license.php\r
-;*\r
-;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;* Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>\r
+;* SPDX-License-Identifier: BSD-2-Clause-Patent\r
;*\r
;*\r
;------------------------------------------------------------------------------\r
\r
- SECTION .rdata\r
+ SECTION .rodata\r
;\r
; Float control word initial value:\r
; all exceptions masked, double-extended-precision, round-to-nearest\r
;\r
; Initialize floating point units\r
;\r
- ; The following opcodes stand for instruction 'finit'\r
- ; to be supported by some 64-bit assemblers\r
- ;\r
- DB 0x9B, 0xDB, 0xE3\r
+ finit\r
fldcw [mFpuControlWord]\r
\r
;\r