UefiCpuPkg BaseXApic(X2)Lib: Add ASSERT if local APIC not software enabled

[mirror_edk2.git] / UefiCpuPkg / Library / BaseXApicX2ApicLib / BaseXApicX2ApicLib.c

diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
index 8c6e8d7415642f3175fd2e3e86a53e0691cbe481..1a91116b8ffb9fb35a1c2341f22e2152aa04f291 100644 (file)
--- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
+++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c
@@ -4,7 +4,7 @@
   This local APIC library instance supports x2APIC capable processors\r
   which have xAPIC and x2APIC modes.\r
 \r
-  Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -818,6 +818,8 @@ InitializeApicTimer (
 /**\r
   Get the state of the local APIC timer.\r
 \r
+  This function will ASSERT if the local APIC is not software enabled.\r
+\r
   @param DivideValue   Return the divide value for the DCR. It is one of 1,2,4,8,16,32,64,128.\r
   @param PeriodicMode  Return the timer mode. If TRUE, timer mode is peridoic. Othewise, timer mode is one-shot.\r
   @param Vector        Return the timer interrupt vector number.\r
@@ -834,6 +836,13 @@ GetApicTimerState (
   LOCAL_APIC_DCR Dcr;\r
   LOCAL_APIC_LVT_TIMER LvtTimer;\r
 \r
+  //\r
+  // Check the APIC Software Enable/Disable bit (bit 8) in Spurious-Interrupt\r
+  // Vector Register.\r
+  // This bit will be 1, if local APIC is software enabled.\r
+  //\r
+  ASSERT ((ReadLocalApicReg(XAPIC_SPURIOUS_VECTOR_OFFSET) & BIT8) != 0);\r
+\r
   if (DivideValue != NULL) {\r
     Dcr.Uint32 = ReadLocalApicReg (XAPIC_TIMER_DIVIDE_CONFIGURATION_OFFSET);\r
     Divisor = Dcr.Bits.DivideValue1 | (Dcr.Bits.DivideValue2 << 2);\r