UefiCpuPkg: Replace BSD License with BSD+Patent License

[mirror_edk2.git] / UefiCpuPkg / Library / CpuCommonFeaturesLib / FeatureControl.c

diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c
index d28c4ec51a04164480ffbae86a01f457151eee84..3712ef1e5cc9c5417491c08b3f0204a50a35a631 100644 (file)
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/FeatureControl.c
@@ -2,13 +2,7 @@
   Features in MSR_IA32_FEATURE_CONTROL register.\r
 \r
   Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
-  This program and the accompanying materials\r
-  are licensed and made available under the terms and conditions of the BSD License\r
-  which accompanies this distribution.  The full text of the license may be found at\r
-  http://opensource.org/licenses/bsd-license.php\r
-\r
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+  SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
 \r
@@ -96,6 +90,19 @@ VmxInitialize (
 {\r
   MSR_IA32_FEATURE_CONTROL_REGISTER    *MsrRegister;\r
 \r
+  //\r
+  // The scope of EnableVmxOutsideSmx bit in the MSR_IA32_FEATURE_CONTROL is core for\r
+  // below processor type, only program MSR_IA32_FEATURE_CONTROL for thread 0 in each\r
+  // core.\r
+  //\r
+  if (IS_SILVERMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r
+      IS_GOLDMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r
+      IS_GOLDMONT_PLUS_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {\r
+    if (CpuInfo->ProcessorInfo.Location.Thread != 0) {\r
+      return RETURN_SUCCESS;\r
+    }\r
+  }\r
+\r
   ASSERT (ConfigData != NULL);\r
   MsrRegister = (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData;\r
   if (MsrRegister[ProcessorNumber].Bits.Lock == 0) {\r
@@ -171,6 +178,19 @@ LockFeatureControlRegisterInitialize (
 {\r
   MSR_IA32_FEATURE_CONTROL_REGISTER    *MsrRegister;\r
 \r
+  //\r
+  // The scope of Lock bit in the MSR_IA32_FEATURE_CONTROL is core for\r
+  // below processor type, only program MSR_IA32_FEATURE_CONTROL for thread 0 in each\r
+  // core.\r
+  //\r
+  if (IS_SILVERMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r
+      IS_GOLDMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r
+      IS_GOLDMONT_PLUS_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {\r
+    if (CpuInfo->ProcessorInfo.Location.Thread != 0) {\r
+      return RETURN_SUCCESS;\r
+    }\r
+  }\r
+\r
   ASSERT (ConfigData != NULL);\r
   MsrRegister = (MSR_IA32_FEATURE_CONTROL_REGISTER *) ConfigData;\r
   if (MsrRegister[ProcessorNumber].Bits.Lock == 0) {\r
@@ -248,6 +268,18 @@ SmxInitialize (
   MSR_IA32_FEATURE_CONTROL_REGISTER    *MsrRegister;\r
   RETURN_STATUS                        Status;\r
 \r
+  //\r
+  // The scope of Lock bit in the MSR_IA32_FEATURE_CONTROL is core for\r
+  // below processor type, only program MSR_IA32_FEATURE_CONTROL for thread 0 in each\r
+  // core.\r
+  //\r
+  if (IS_GOLDMONT_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||\r
+      IS_GOLDMONT_PLUS_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {\r
+    if (CpuInfo->ProcessorInfo.Location.Thread != 0) {\r
+      return RETURN_SUCCESS;\r
+    }\r
+  }\r
+\r
   Status = RETURN_SUCCESS;\r
 \r
   if (State && (!IsCpuFeatureInSetting (CPU_FEATURE_VMX))) {\r