#\r
# Put Vector Number on stack and restore ECX\r
#\r
- xchgl (%esp), %ecx \r
+ xchgl (%esp), %ecx\r
\r
ErrorCodeAndVectorOnStack:\r
pushl %ebp\r
# Align stack to make sure that EFI_FX_SAVE_STATE_IA32 of EFI_SYSTEM_CONTEXT_IA32\r
# is 16-byte aligned\r
#\r
- andl $0x0fffffff0, %esp \r
+ andl $0x0fffffff0, %esp\r
subl $12, %esp\r
\r
subl $8, %esp\r
pushl $0 # check EXCEPTION_HANDLER_CONTEXT.OldIdtHandler\r
pushl $0 # check EXCEPTION_HANDLER_CONTEXT.ExceptionDataFlag\r
- \r
+\r
#; UINT32 Edi, Esi, Ebp, Esp, Ebx, Edx, Ecx, Eax;\r
pushl %eax\r
pushl %ecx\r
#; UINT32 Gs, Fs, Es, Ds, Cs, Ss;\r
movl %ss, %eax\r
pushl %eax\r
- movzwl 16(%ebp), %eax \r
+ movzwl 16(%ebp), %eax\r
pushl %eax\r
movl %ds, %eax\r
pushl %eax\r
sidt (%esp)\r
movl 2(%esp), %eax\r
xchgl (%esp), %eax\r
- andl $0x0FFFF, %eax \r
+ andl $0x0FFFF, %eax\r
movl %eax, 4(%esp)\r
\r
subl $8, %esp\r
sgdt (%esp)\r
movl 2(%esp), %eax\r
xchgl (%esp), %eax\r
- andl $0x0FFFF, %eax \r
+ andl $0x0FFFF, %eax\r
movl %eax, 4(%esp)\r
\r
#; UINT32 Ldtr, Tr;\r
## insure FXSAVE/FXRSTOR is enabled in CR4...\r
## ... while we're at it, make sure DE is also enabled...\r
mov $1, %eax\r
- pushl %ebx # temporarily save value of ebx on stack \r
+ pushl %ebx # temporarily save value of ebx on stack\r
cpuid # use CPUID to determine if FXSAVE/FXRESTOR\r
# and DE are supported\r
popl %ebx # retore value of ebx that was overwritten\r
- # by CPUID \r
+ # by CPUID\r
movl %cr4, %eax\r
pushl %eax # push cr4 firstly\r
testl $BIT24, %edx # Test for FXSAVE/FXRESTOR support\r
jz L1\r
orl $BIT9, %eax # Set CR4.OSFXSR\r
-L1: \r
+L1:\r
testl $BIT2, %edx # Test for Debugging Extensions support\r
jz L2\r
orl $BIT3, %eax # Set CR4.DE\r
-L2: \r
+L2:\r
movl %eax, %cr4\r
movl %cr3, %eax\r
pushl %eax\r
#; FX_SAVE_STATE_IA32 FxSaveState;\r
subl $512, %esp\r
movl %esp, %edi\r
- testl $BIT24, %edx # Test for FXSAVE/FXRESTOR support. \r
+ testl $BIT24, %edx # Test for FXSAVE/FXRESTOR support.\r
# edx still contains result from CPUID above\r
jz L3\r
.byte 0x0f, 0x0ae, 0x07 #fxsave [edi]\r
-L3: \r
+L3:\r
\r
#; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear\r
cld\r
#; FX_SAVE_STATE_IA32 FxSaveState;\r
movl %esp, %esi\r
movl $1, %eax\r
- cpuid # use CPUID to determine if FXSAVE/FXRESTOR \r
+ cpuid # use CPUID to determine if FXSAVE/FXRESTOR\r
# are supported\r
testl $BIT24, %edx # Test for FXSAVE/FXRESTOR support\r
jz L4\r
.byte 0x0f, 0x0ae, 0x0e # fxrstor [esi]\r
-L4: \r
+L4:\r
addl $512, %esp\r
\r
#; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
#---------------------------------------;\r
# _AsmGetTemplateAddressMap ;\r
#---------------------------------------;\r
-# \r
+#\r
# Protocol prototype\r
# AsmGetTemplateAddressMap (\r
# EXCEPTION_HANDLER_TEMPLATE_MAP *AddressMap\r
# );\r
-# \r
+#\r
# Routine Description:\r
-# \r
+#\r
# Return address map of interrupt handler template so that C code can generate\r
# interrupt table.\r
-# \r
+#\r
# Arguments:\r
-# \r
-# \r
-# Returns: \r
-# \r
+#\r
+#\r
+# Returns:\r
+#\r
# Nothing\r
#\r
-# \r
+#\r
# Input: [ebp][0] = Original ebp\r
# [ebp][4] = Return address\r
-# \r
+#\r
# Output: Nothing\r
-# \r
+#\r
# Destroys: Nothing\r
#-----------------------------------------------------------------------------;\r
#-------------------------------------------------------------------------------------\r