UefiCpuPkg/ExceptionLib: Add CET support.

[mirror_edk2.git] / UefiCpuPkg / Library / CpuExceptionHandlerLib / X64 / ArchExceptionHandler.c

diff --git a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
index 4d52b4eb0e028883e349b271f319b4da0e6dedd5..0183239e598fd65031603b94dd2b2d22973d0b69 100644 (file)
--- a/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
+++ b/UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ArchExceptionHandler.c
@@ -1,7 +1,7 @@
 /** @file\r
   x64 CPU Exception Handler.\r
 \r
-  Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2012 - 2019, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -67,7 +67,9 @@ ArchSaveExceptionContext (
 \r
   ReservedVectors = ExceptionHandlerData->ReservedVectors;\r
   //\r
-  // Save Exception context in global variable\r
+  // Save Exception context in global variable in first entry of the exception handler.\r
+  // So when original exception handler returns to the new exception handler (second entry),\r
+  // the Eflags/Cs/Eip/ExceptionData can be used.\r
   //\r
   ReservedVectors[ExceptionType].OldSs         = SystemContext.SystemContextX64->Ss;\r
   ReservedVectors[ExceptionType].OldSp         = SystemContext.SystemContextX64->Rsp;\r
@@ -82,7 +84,7 @@ ArchSaveExceptionContext (
   Eflags.Bits.IF = 0;\r
   SystemContext.SystemContextX64->Rflags = Eflags.UintN;\r
   //\r
-  // Modify the EIP in stack, then old IDT handler will return to the stub code\r
+  // Modify the EIP in stack, then old IDT handler will return to HookAfterStubBegin.\r
   //\r
   SystemContext.SystemContextX64->Rip = (UINTN) ReservedVectors[ExceptionType].HookAfterStubHeaderCode;\r
 }\r
@@ -124,7 +126,7 @@ ArchRestoreExceptionContext (
 \r
 **/\r
 EFI_STATUS\r
-ArchSetupExcpetionStack (\r
+ArchSetupExceptionStack (\r
   IN CPU_EXCEPTION_INIT_DATA          *StackSwitchData\r
   )\r
 {\r
@@ -186,7 +188,7 @@ ArchSetupExcpetionStack (
   //\r
   TssDesc = StackSwitchData->X64.ExceptionTssDesc;\r
   Tss     = StackSwitchData->X64.ExceptionTss;\r
-  if (StackSwitchData->X64.StackSwitchExceptionNumber > ARRAY_SIZE (Tss->Ist)) {\r
+  if (StackSwitchData->X64.StackSwitchExceptionNumber > ARRAY_SIZE (Tss->IST)) {\r
     return EFI_INVALID_PARAMETER;\r
   }\r
 \r
@@ -217,11 +219,13 @@ ArchSetupExcpetionStack (
   //\r
   TssBase = (UINTN)Tss;\r
 \r
+  TssDesc->Uint128.Uint64  = 0;\r
+  TssDesc->Uint128.Uint64_1= 0;\r
   TssDesc->Bits.LimitLow   = sizeof(IA32_TASK_STATE_SEGMENT) - 1;\r
   TssDesc->Bits.BaseLow    = (UINT16)TssBase;\r
   TssDesc->Bits.BaseMidl   = (UINT8)(TssBase >> 16);\r
   TssDesc->Bits.Type       = IA32_GDT_TYPE_TSS;\r
-  TssDesc->Bits.Present    = 1;\r
+  TssDesc->Bits.P          = 1;\r
   TssDesc->Bits.LimitHigh  = 0;\r
   TssDesc->Bits.BaseMidh   = (UINT8)(TssBase >> 24);\r
   TssDesc->Bits.BaseHigh   = (UINT32)(TssBase >> 32);\r
@@ -229,6 +233,7 @@ ArchSetupExcpetionStack (
   //\r
   // Fixup exception task descriptor and task-state segment\r
   //\r
+  ZeroMem (Tss, sizeof (*Tss));\r
   StackTop = StackSwitchData->X64.KnownGoodStackTop - CPU_STACK_ALIGNMENT;\r
   StackTop = (UINTN)ALIGN_POINTER (StackTop, CPU_STACK_ALIGNMENT);\r
   IdtTable = StackSwitchData->X64.IdtTable;\r
@@ -236,7 +241,7 @@ ArchSetupExcpetionStack (
     //\r
     // Fixup IST\r
     //\r
-    Tss->Ist[Index] = StackTop;\r
+    Tss->IST[Index] = StackTop;\r
     StackTop -= StackSwitchData->X64.KnownGoodStackSize;\r
 \r
     //\r
@@ -294,13 +299,14 @@ DumpCpuContext (
       );\r
     if (ExceptionType == EXCEPT_IA32_PAGE_FAULT) {\r
       InternalPrintMessage (\r
-        "  I:%x R:%x U:%x W:%x P:%x PK:%x S:%x",\r
+        "  I:%x R:%x U:%x W:%x P:%x PK:%x SS:%x SGX:%x",\r
         (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID)   != 0,\r
         (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_RSVD) != 0,\r
         (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_US)   != 0,\r
         (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_WR)   != 0,\r
         (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_P)    != 0,\r
         (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_PK)   != 0,\r
+        (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_SS)   != 0,\r
         (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_SGX)  != 0\r
         );\r
     }\r
@@ -414,5 +420,14 @@ DumpImageAndCpuContent (
   //\r
   // Dump module image base and module entry point by RIP\r
   //\r
-  DumpModuleImageInfo (SystemContext.SystemContextX64->Rip);\r
+  if ((ExceptionType == EXCEPT_IA32_PAGE_FAULT) &&\r
+      ((SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != 0)) {\r
+    //\r
+    // The RIP in SystemContext could not be used\r
+    // if it is page fault with I/D set.\r
+    //\r
+    DumpModuleImageInfo ((*(UINTN *)(UINTN)SystemContext.SystemContextX64->Rsp));\r
+  } else {\r
+    DumpModuleImageInfo (SystemContext.SystemContextX64->Rip);\r
+  }\r
 }\r