mov cr0, eax\r
\r
SkipEnableExecuteDisable:\r
+ mov edi, esi\r
+ add edi, InitFlagLocation\r
+ cmp dword [edi], 1 ; 1 == ApInitConfig\r
+ jnz GetApicId\r
\r
+ ; AP init\r
mov edi, esi\r
add edi, LockLocation\r
mov eax, NotVacantFlag\r
cmp eax, NotVacantFlag\r
jz TestLock\r
\r
- mov edi, esi\r
- add edi, NumApsExecutingLocation\r
- inc dword [edi]\r
- mov ebx, [edi]\r
+ mov ecx, esi\r
+ add ecx, NumApsExecutingLocation\r
+ inc dword [ecx]\r
+ mov ebx, [ecx]\r
+\r
+Releaselock:\r
+ mov eax, VacantFlag\r
+ xchg [edi], eax\r
\r
-ProgramStack:\r
mov edi, esi\r
add edi, StackSizeLocation\r
mov eax, [edi]\r
+ mov ecx, ebx\r
+ inc ecx\r
+ mul ecx ; EAX = StackSize * (CpuNumber + 1)\r
mov edi, esi\r
add edi, StackStartAddressLocation\r
add eax, [edi]\r
mov esp, eax\r
- mov [edi], eax\r
+ jmp CProcedureInvoke\r
+\r
+GetApicId:\r
+ mov eax, 0\r
+ cpuid\r
+ cmp eax, 0bh\r
+ jnb X2Apic\r
+ ; Processor is not x2APIC capable, so get 8-bit APIC ID\r
+ mov eax, 1\r
+ cpuid\r
+ shr ebx, 24\r
+ mov edx, ebx\r
+ jmp GetProcessorNumber\r
+\r
+X2Apic:\r
+ ; Processor is x2APIC capable, so get 32-bit x2APIC ID\r
+ mov eax, 0bh\r
+ xor ecx, ecx\r
+ cpuid \r
+ ; edx save x2APIC ID\r
+ \r
+GetProcessorNumber:\r
+ ;\r
+ ; Get processor number for this AP\r
+ ; Note that BSP may become an AP due to SwitchBsp()\r
+ ;\r
+ xor ebx, ebx\r
+ lea eax, [esi + CpuInfoLocation]\r
+ mov edi, [eax]\r
\r
-Releaselock:\r
- mov eax, VacantFlag\r
- mov edi, esi\r
- add edi, LockLocation\r
- xchg [edi], eax\r
+GetNextProcNumber:\r
+ cmp [edi], edx ; APIC ID match?\r
+ jz ProgramStack\r
+ add edi, 16\r
+ inc ebx\r
+ jmp GetNextProcNumber \r
\r
+ProgramStack:\r
+ mov esp, [edi + 12]\r
+ \r
CProcedureInvoke:\r
push ebp ; push BIST data at top of AP stack\r
xor ebp, ebp ; clear ebp for call stack trace\r