CPU MP Initialize Library common functions.\r
\r
Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>\r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+ SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
CPUID_VERSION_INFO_EDX VersionInfoEdx;\r
IA32_TSS_DESCRIPTOR *Tss;\r
\r
- AsmWriteCr0 (VolatileRegisters->Cr0);\r
AsmWriteCr3 (VolatileRegisters->Cr3);\r
AsmWriteCr4 (VolatileRegisters->Cr4);\r
+ AsmWriteCr0 (VolatileRegisters->Cr0);\r
\r
if (IsRestoreDr) {\r
AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &VersionInfoEdx.Uint32);\r
CPU_INFO_IN_HOB CpuInfo;\r
UINT32 ApCount;\r
CPU_INFO_IN_HOB *CpuInfoInHob;\r
+ volatile UINT32 *StartupApSignal;\r
\r
ApCount = CpuMpData->CpuCount - 1;\r
CpuInfoInHob = (CPU_INFO_IN_HOB *) (UINTN) CpuMpData->CpuInfoInHob;\r
sizeof (CPU_INFO_IN_HOB)\r
);\r
CopyMem (&CpuInfoInHob[Index1], &CpuInfo, sizeof (CPU_INFO_IN_HOB));\r
+\r
+ //\r
+ // Also exchange the StartupApSignal.\r
+ //\r
+ StartupApSignal = CpuMpData->CpuData[Index3].StartupApSignal;\r
+ CpuMpData->CpuData[Index3].StartupApSignal =\r
+ CpuMpData->CpuData[Index1].StartupApSignal;\r
+ CpuMpData->CpuData[Index1].StartupApSignal = StartupApSignal;\r
}\r
}\r
\r
//\r
// Load microcode on AP\r
//\r
- MicrocodeDetect (CpuMpData);\r
+ MicrocodeDetect (CpuMpData, FALSE);\r
//\r
// Sync BSP's MTRR table to AP\r
//\r
UINTN TotalProcessorNumber;\r
UINTN Index;\r
CPU_INFO_IN_HOB *CpuInfoInHob;\r
+ UINT32 CurrentApicId;\r
\r
CpuInfoInHob = (CPU_INFO_IN_HOB *) (UINTN) CpuMpData->CpuInfoInHob;\r
\r
TotalProcessorNumber = CpuMpData->CpuCount;\r
+ CurrentApicId = GetApicId ();\r
for (Index = 0; Index < TotalProcessorNumber; Index ++) {\r
- if (CpuInfoInHob[Index].ApicId == GetApicId ()) {\r
+ if (CpuInfoInHob[Index].ApicId == CurrentApicId) {\r
*ProcessorNumber = Index;\r
return EFI_SUCCESS;\r
}\r
}\r
+\r
return EFI_NOT_FOUND;\r
}\r
\r
//\r
CpuMpData->InitFlag = ApInitConfig;\r
CpuMpData->X2ApicEnable = FALSE;\r
- WakeUpAP (CpuMpData, TRUE, 0, NULL, NULL);\r
+ WakeUpAP (CpuMpData, TRUE, 0, NULL, NULL, TRUE);\r
CpuMpData->InitFlag = ApInitDone;\r
ASSERT (CpuMpData->CpuCount <= PcdGet32 (PcdCpuMaxLogicalProcessorNumber));\r
//\r
//\r
// Wakeup all APs to enable x2APIC mode\r
//\r
- WakeUpAP (CpuMpData, TRUE, 0, ApFuncEnableX2Apic, NULL);\r
+ WakeUpAP (CpuMpData, TRUE, 0, ApFuncEnableX2Apic, NULL, TRUE);\r
//\r
// Wait for all known APs finished\r
//\r
//\r
ApInitializeSync (CpuMpData);\r
//\r
- // Sync BSP's Control registers to APs\r
+ // CpuMpData->CpuData[0].VolatileRegisters is initialized based on BSP environment,\r
+ // to initialize AP in InitConfig path.\r
+ // NOTE: IDTR.BASE stored in CpuMpData->CpuData[0].VolatileRegisters points to a different IDT shared by all APs.\r
//\r
RestoreVolatileRegisters (&CpuMpData->CpuData[0].VolatileRegisters, FALSE);\r
InitializeApData (CpuMpData, ProcessorNumber, BistData, ApTopOfStack);\r
// Restore AP's volatile registers saved\r
//\r
RestoreVolatileRegisters (&CpuMpData->CpuData[ProcessorNumber].VolatileRegisters, TRUE);\r
+ } else {\r
+ //\r
+ // The CPU driver might not flush TLB for APs on spot after updating\r
+ // page attributes. AP in mwait loop mode needs to take care of it when\r
+ // woken up.\r
+ //\r
+ CpuFlushTlb ();\r
}\r
\r
if (GetApState (&CpuMpData->CpuData[ProcessorNumber]) == CpuStateReady) {\r
SetApState (&CpuMpData->CpuData[ProcessorNumber], CpuStateBusy);\r
//\r
// Enable source debugging on AP function\r
- // \r
+ //\r
EnableDebugAgent ();\r
//\r
// Invoke AP function here\r
)\r
{\r
volatile MP_CPU_EXCHANGE_INFO *ExchangeInfo;\r
+ UINTN Size;\r
+ IA32_SEGMENT_DESCRIPTOR *Selector;\r
\r
ExchangeInfo = CpuMpData->MpCpuExchangeInfo;\r
ExchangeInfo->Lock = 0;\r
//\r
AsmReadGdtr ((IA32_DESCRIPTOR *) &ExchangeInfo->GdtrProfile);\r
AsmReadIdtr ((IA32_DESCRIPTOR *) &ExchangeInfo->IdtrProfile);\r
+\r
+ //\r
+ // Find a 32-bit code segment\r
+ //\r
+ Selector = (IA32_SEGMENT_DESCRIPTOR *)ExchangeInfo->GdtrProfile.Base;\r
+ Size = ExchangeInfo->GdtrProfile.Limit + 1;\r
+ while (Size > 0) {\r
+ if (Selector->Bits.L == 0 && Selector->Bits.Type >= 8) {\r
+ ExchangeInfo->ModeTransitionSegment =\r
+ (UINT16)((UINTN)Selector - ExchangeInfo->GdtrProfile.Base);\r
+ break;\r
+ }\r
+ Selector += 1;\r
+ Size -= sizeof (IA32_SEGMENT_DESCRIPTOR);\r
+ }\r
+\r
+ //\r
+ // Copy all 32-bit code and 64-bit code into memory with type of\r
+ // EfiBootServicesCode to avoid page fault if NX memory protection is enabled.\r
+ //\r
+ if (CpuMpData->WakeupBufferHigh != 0) {\r
+ Size = CpuMpData->AddressMap.RendezvousFunnelSize -\r
+ CpuMpData->AddressMap.ModeTransitionOffset;\r
+ CopyMem (\r
+ (VOID *)CpuMpData->WakeupBufferHigh,\r
+ CpuMpData->AddressMap.RendezvousFunnelAddress +\r
+ CpuMpData->AddressMap.ModeTransitionOffset,\r
+ Size\r
+ );\r
+\r
+ ExchangeInfo->ModeTransitionMemory = (UINT32)CpuMpData->WakeupBufferHigh;\r
+ } else {\r
+ ExchangeInfo->ModeTransitionMemory = (UINT32)\r
+ (ExchangeInfo->BufferStart + CpuMpData->AddressMap.ModeTransitionOffset);\r
+ }\r
+\r
+ ExchangeInfo->ModeHighMemory = ExchangeInfo->ModeTransitionMemory +\r
+ (UINT32)ExchangeInfo->ModeOffset -\r
+ (UINT32)CpuMpData->AddressMap.ModeTransitionOffset;\r
+ ExchangeInfo->ModeHighSegment = (UINT16)ExchangeInfo->CodeSegment;\r
}\r
\r
/**\r
CpuMpData->WakeupBuffer = GetWakeupBuffer (ApResetVectorSize);\r
CpuMpData->MpCpuExchangeInfo = (MP_CPU_EXCHANGE_INFO *) (UINTN)\r
(CpuMpData->WakeupBuffer + CpuMpData->AddressMap.RendezvousFunnelSize);\r
+ CpuMpData->WakeupBufferHigh = GetModeTransitionBuffer (\r
+ CpuMpData->AddressMap.RendezvousFunnelSize -\r
+ CpuMpData->AddressMap.ModeTransitionOffset\r
+ );\r
}\r
BackupAndPrepareWakeupBuffer (CpuMpData);\r
}\r
@param[in] ProcessorNumber The handle number of specified processor\r
@param[in] Procedure The function to be invoked by AP\r
@param[in] ProcedureArgument The argument to be passed into AP function\r
+ @param[in] WakeUpDisabledAps Whether need to wake up disabled APs in broadcast mode.\r
**/\r
VOID\r
WakeUpAP (\r
IN BOOLEAN Broadcast,\r
IN UINTN ProcessorNumber,\r
IN EFI_AP_PROCEDURE Procedure, OPTIONAL\r
- IN VOID *ProcedureArgument OPTIONAL\r
+ IN VOID *ProcedureArgument, OPTIONAL\r
+ IN BOOLEAN WakeUpDisabledAps\r
)\r
{\r
volatile MP_CPU_EXCHANGE_INFO *ExchangeInfo;\r
CpuMpData->FinishedCount = 0;\r
ResetVectorRequired = FALSE;\r
\r
- if (CpuMpData->ApLoopMode == ApInHltLoop ||\r
+ if (CpuMpData->WakeUpByInitSipiSipi ||\r
CpuMpData->InitFlag != ApInitDone) {\r
ResetVectorRequired = TRUE;\r
AllocateResetVector (CpuMpData);\r
FillExchangeInfoData (CpuMpData);\r
SaveLocalApicTimerSetting (CpuMpData);\r
- } else if (CpuMpData->ApLoopMode == ApInMwaitLoop) {\r
+ }\r
+\r
+ if (CpuMpData->ApLoopMode == ApInMwaitLoop) {\r
//\r
// Get AP target C-state each time when waking up AP,\r
// for it maybe updated by platform again\r
for (Index = 0; Index < CpuMpData->CpuCount; Index++) {\r
if (Index != CpuMpData->BspNumber) {\r
CpuData = &CpuMpData->CpuData[Index];\r
+ //\r
+ // All AP(include disabled AP) will be woke up by INIT-SIPI-SIPI, but\r
+ // the AP procedure will be skipped for disabled AP because AP state\r
+ // is not CpuStateReady.\r
+ //\r
+ if (GetApState (CpuData) == CpuStateDisabled && !WakeUpDisabledAps) {\r
+ continue;\r
+ }\r
+\r
CpuData->ApFunction = (UINTN) Procedure;\r
CpuData->ApFunctionArgument = (UINTN) ProcedureArgument;\r
SetApState (CpuData, CpuStateReady);\r
if (ResetVectorRequired) {\r
FreeResetVector (CpuMpData);\r
}\r
+\r
+ //\r
+ // After one round of Wakeup Ap actions, need to re-sync ApLoopMode with\r
+ // WakeUpByInitSipiSipi flag. WakeUpByInitSipiSipi flag maybe changed by\r
+ // S3SmmInitDone Ppi.\r
+ //\r
+ CpuMpData->WakeUpByInitSipiSipi = (CpuMpData->ApLoopMode == ApInHltLoop);\r
}\r
\r
/**\r
\r
//\r
// GetPerformanceCounterProperties () returns the timestamp counter's frequency\r
- // in Hz. \r
+ // in Hz.\r
//\r
TimestampCounterFreq = GetPerformanceCounterProperties (NULL, NULL);\r
\r
CpuMpData = GetCpuMpData ();\r
\r
CpuMpData->InitFlag = ApInitReconfig;\r
- WakeUpAP (CpuMpData, FALSE, ProcessorNumber, NULL, NULL);\r
+ WakeUpAP (CpuMpData, FALSE, ProcessorNumber, NULL, NULL, TRUE);\r
while (CpuMpData->FinishedCount < 1) {\r
CpuPause ();\r
}\r
CpuData = &CpuMpData->CpuData[ProcessorNumber];\r
\r
//\r
- // Check the CPU state of AP. If it is CpuStateFinished, then the AP has finished its task.\r
+ // Check the CPU state of AP. If it is CpuStateIdle, then the AP has finished its task.\r
// Only BSP and corresponding AP access this unit of CPU Data. This means the AP will not modify the\r
- // value of state after setting the it to CpuStateFinished, so BSP can safely make use of its value.\r
+ // value of state after setting the it to CpuStateIdle, so BSP can safely make use of its value.\r
//\r
//\r
// If the AP finishes for StartupThisAP(), return EFI_SUCCESS.\r
\r
CpuData = &CpuMpData->CpuData[ProcessorNumber];\r
//\r
- // Check the CPU state of AP. If it is CpuStateFinished, then the AP has finished its task.\r
+ // Check the CPU state of AP. If it is CpuStateIdle, then the AP has finished its task.\r
// Only BSP and corresponding AP access this unit of CPU Data. This means the AP will not modify the\r
- // value of state after setting the it to CpuStateFinished, so BSP can safely make use of its value.\r
+ // value of state after setting the it to CpuStateIdle, so BSP can safely make use of its value.\r
//\r
if (GetApState(CpuData) == CpuStateFinished) {\r
- CpuMpData->RunningCount ++;\r
+ CpuMpData->RunningCount --;\r
CpuMpData->CpuData[ProcessorNumber].Waiting = FALSE;\r
SetApState(CpuData, CpuStateIdle);\r
\r
FALSE,\r
(UINT32) NextProcessorNumber,\r
CpuMpData->Procedure,\r
- CpuMpData->ProcArguments\r
+ CpuMpData->ProcArguments,\r
+ TRUE\r
);\r
}\r
}\r
//\r
// If all APs finish, return EFI_SUCCESS.\r
//\r
- if (CpuMpData->RunningCount == CpuMpData->StartCount) {\r
+ if (CpuMpData->RunningCount == 0) {\r
return EFI_SUCCESS;\r
}\r
\r
//\r
if (CpuMpData->FailedCpuList != NULL) {\r
*CpuMpData->FailedCpuList =\r
- AllocatePool ((CpuMpData->StartCount - CpuMpData->FinishedCount + 1) * sizeof (UINTN));\r
+ AllocatePool ((CpuMpData->RunningCount + 1) * sizeof (UINTN));\r
ASSERT (*CpuMpData->FailedCpuList != NULL);\r
}\r
ListIndex = 0;\r
UINT32 MaxLogicalProcessorNumber;\r
UINT32 ApStackSize;\r
MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r
+ CPU_VOLATILE_REGISTERS VolatileRegisters;\r
UINTN BufferSize;\r
UINT32 MonitorFilterSize;\r
VOID *MpBuffer;\r
UINTN Index;\r
UINTN ApResetVectorSize;\r
UINTN BackupBufferAddr;\r
+ UINTN ApIdtBase;\r
+ VOID *MicrocodePatchInRam;\r
\r
OldCpuMpData = GetCpuMpDataFromGuidedHob ();\r
if (OldCpuMpData == NULL) {\r
ApStackSize = PcdGet32(PcdCpuApStackSize);\r
ApLoopMode = GetApLoopMode (&MonitorFilterSize);\r
\r
+ //\r
+ // Save BSP's Control registers for APs.\r
+ //\r
+ SaveVolatileRegisters (&VolatileRegisters);\r
+\r
BufferSize = ApStackSize * MaxLogicalProcessorNumber;\r
BufferSize += MonitorFilterSize * MaxLogicalProcessorNumber;\r
- BufferSize += sizeof (CPU_MP_DATA);\r
BufferSize += ApResetVectorSize;\r
+ BufferSize = ALIGN_VALUE (BufferSize, 8);\r
+ BufferSize += VolatileRegisters.Idtr.Limit + 1;\r
+ BufferSize += sizeof (CPU_MP_DATA);\r
BufferSize += (sizeof (CPU_AP_DATA) + sizeof (CPU_INFO_IN_HOB))* MaxLogicalProcessorNumber;\r
MpBuffer = AllocatePages (EFI_SIZE_TO_PAGES (BufferSize));\r
ASSERT (MpBuffer != NULL);\r
ZeroMem (MpBuffer, BufferSize);\r
Buffer = (UINTN) MpBuffer;\r
\r
+ //\r
+ // The layout of the Buffer is as below:\r
+ //\r
+ // +--------------------+ <-- Buffer\r
+ // AP Stacks (N)\r
+ // +--------------------+ <-- MonitorBuffer\r
+ // AP Monitor Filters (N)\r
+ // +--------------------+ <-- BackupBufferAddr (CpuMpData->BackupBuffer)\r
+ // Backup Buffer\r
+ // +--------------------+\r
+ // Padding\r
+ // +--------------------+ <-- ApIdtBase (8-byte boundary)\r
+ // AP IDT All APs share one separate IDT. So AP can get address of CPU_MP_DATA from IDT Base.\r
+ // +--------------------+ <-- CpuMpData\r
+ // CPU_MP_DATA\r
+ // +--------------------+ <-- CpuMpData->CpuData\r
+ // CPU_AP_DATA (N)\r
+ // +--------------------+ <-- CpuMpData->CpuInfoInHob\r
+ // CPU_INFO_IN_HOB (N)\r
+ // +--------------------+\r
+ //\r
MonitorBuffer = (UINT8 *) (Buffer + ApStackSize * MaxLogicalProcessorNumber);\r
BackupBufferAddr = (UINTN) MonitorBuffer + MonitorFilterSize * MaxLogicalProcessorNumber;\r
- CpuMpData = (CPU_MP_DATA *) (BackupBufferAddr + ApResetVectorSize);\r
+ ApIdtBase = ALIGN_VALUE (BackupBufferAddr + ApResetVectorSize, 8);\r
+ CpuMpData = (CPU_MP_DATA *) (ApIdtBase + VolatileRegisters.Idtr.Limit + 1);\r
CpuMpData->Buffer = Buffer;\r
CpuMpData->CpuApStackSize = ApStackSize;\r
CpuMpData->BackupBuffer = BackupBufferAddr;\r
CpuMpData->SwitchBspFlag = FALSE;\r
CpuMpData->CpuData = (CPU_AP_DATA *) (CpuMpData + 1);\r
CpuMpData->CpuInfoInHob = (UINT64) (UINTN) (CpuMpData->CpuData + MaxLogicalProcessorNumber);\r
- CpuMpData->MicrocodePatchAddress = PcdGet64 (PcdCpuMicrocodePatchAddress);\r
CpuMpData->MicrocodePatchRegionSize = PcdGet64 (PcdCpuMicrocodePatchRegionSize);\r
+ //\r
+ // If platform has more than one CPU, relocate microcode to memory to reduce\r
+ // loading microcode time.\r
+ //\r
+ MicrocodePatchInRam = NULL;\r
+ if (MaxLogicalProcessorNumber > 1) {\r
+ MicrocodePatchInRam = AllocatePages (\r
+ EFI_SIZE_TO_PAGES (\r
+ (UINTN)CpuMpData->MicrocodePatchRegionSize\r
+ )\r
+ );\r
+ }\r
+ if (MicrocodePatchInRam == NULL) {\r
+ //\r
+ // there is only one processor, or no microcode patch is available, or\r
+ // memory allocation failed\r
+ //\r
+ CpuMpData->MicrocodePatchAddress = PcdGet64 (PcdCpuMicrocodePatchAddress);\r
+ } else {\r
+ //\r
+ // there are multiple processors, and a microcode patch is available, and\r
+ // memory allocation succeeded\r
+ //\r
+ CopyMem (\r
+ MicrocodePatchInRam,\r
+ (VOID *)(UINTN)PcdGet64 (PcdCpuMicrocodePatchAddress),\r
+ (UINTN)CpuMpData->MicrocodePatchRegionSize\r
+ );\r
+ CpuMpData->MicrocodePatchAddress = (UINTN)MicrocodePatchInRam;\r
+ }\r
+\r
InitializeSpinLock(&CpuMpData->MpLock);\r
+\r
+ //\r
+ // Make sure no memory usage outside of the allocated buffer.\r
//\r
- // Save BSP's Control registers to APs\r
+ ASSERT ((CpuMpData->CpuInfoInHob + sizeof (CPU_INFO_IN_HOB) * MaxLogicalProcessorNumber) ==\r
+ Buffer + BufferSize);\r
+\r
+ //\r
+ // Duplicate BSP's IDT to APs.\r
+ // All APs share one separate IDT. So AP can get the address of CpuMpData by using IDTR.BASE + IDTR.LIMIT + 1\r
+ //\r
+ CopyMem ((VOID *)ApIdtBase, (VOID *)VolatileRegisters.Idtr.Base, VolatileRegisters.Idtr.Limit + 1);\r
+ VolatileRegisters.Idtr.Base = ApIdtBase;\r
+ //\r
+ // Don't pass BSP's TR to APs to avoid AP init failure.\r
//\r
- SaveVolatileRegisters (&CpuMpData->CpuData[0].VolatileRegisters);\r
+ VolatileRegisters.Tr = 0;\r
+ CopyMem (&CpuMpData->CpuData[0].VolatileRegisters, &VolatileRegisters, sizeof (VolatileRegisters));\r
//\r
// Set BSP basic information\r
//\r
//\r
CpuMpData->ApLoopMode = ApLoopMode;\r
DEBUG ((DEBUG_INFO, "AP Loop Mode is %d\n", CpuMpData->ApLoopMode));\r
+\r
+ CpuMpData->WakeUpByInitSipiSipi = (CpuMpData->ApLoopMode == ApInHltLoop);\r
+\r
//\r
// Set up APs wakeup signal buffer\r
//\r
//\r
// Load Microcode on BSP\r
//\r
- MicrocodeDetect (CpuMpData);\r
+ MicrocodeDetect (CpuMpData, TRUE);\r
//\r
// Store BSP's MTRR setting\r
//\r
}\r
CpuMpData->CpuData[Index].CpuHealthy = (CpuInfoInHob[Index].Health == 0)? TRUE:FALSE;\r
CpuMpData->CpuData[Index].ApFunction = 0;\r
- CopyMem (\r
- &CpuMpData->CpuData[Index].VolatileRegisters,\r
- &CpuMpData->CpuData[0].VolatileRegisters,\r
- sizeof (CPU_VOLATILE_REGISTERS)\r
- );\r
+ CopyMem (&CpuMpData->CpuData[Index].VolatileRegisters, &VolatileRegisters, sizeof (CPU_VOLATILE_REGISTERS));\r
}\r
if (MaxLogicalProcessorNumber > 1) {\r
//\r
// Wakeup APs to do some AP initialize sync\r
//\r
- WakeUpAP (CpuMpData, TRUE, 0, ApInitializeSync, CpuMpData);\r
+ WakeUpAP (CpuMpData, TRUE, 0, ApInitializeSync, CpuMpData, TRUE);\r
//\r
// Wait for all APs finished initialization\r
//\r
enabled AP. Otherwise, it will be disabled.\r
\r
@retval EFI_SUCCESS BSP successfully switched.\r
- @retval others Failed to switch BSP. \r
+ @retval others Failed to switch BSP.\r
\r
**/\r
EFI_STATUS\r
//\r
// Need to wakeUp AP (future BSP).\r
//\r
- WakeUpAP (CpuMpData, FALSE, ProcessorNumber, FutureBSPProc, CpuMpData);\r
+ WakeUpAP (CpuMpData, FALSE, ProcessorNumber, FutureBSPProc, CpuMpData, TRUE);\r
\r
AsmExchangeRole (&CpuMpData->BSPInfo, &CpuMpData->APInfo);\r
\r
return EFI_NOT_STARTED;\r
}\r
\r
- CpuMpData->StartCount = 0;\r
+ CpuMpData->RunningCount = 0;\r
for (ProcessorNumber = 0; ProcessorNumber < ProcessorCount; ProcessorNumber++) {\r
CpuData = &CpuMpData->CpuData[ProcessorNumber];\r
CpuData->Waiting = FALSE;\r
// Mark this processor as responsible for current calling.\r
//\r
CpuData->Waiting = TRUE;\r
- CpuMpData->StartCount++;\r
+ CpuMpData->RunningCount++;\r
}\r
}\r
}\r
CpuMpData->ProcArguments = ProcedureArgument;\r
CpuMpData->SingleThread = SingleThread;\r
CpuMpData->FinishedCount = 0;\r
- CpuMpData->RunningCount = 0;\r
CpuMpData->FailedCpuList = FailedCpuList;\r
CpuMpData->ExpectedTime = CalculateTimeout (\r
TimeoutInMicroseconds,\r
CpuMpData->WaitEvent = WaitEvent;\r
\r
if (!SingleThread) {\r
- WakeUpAP (CpuMpData, TRUE, 0, Procedure, ProcedureArgument);\r
+ WakeUpAP (CpuMpData, TRUE, 0, Procedure, ProcedureArgument, FALSE);\r
} else {\r
for (ProcessorNumber = 0; ProcessorNumber < ProcessorCount; ProcessorNumber++) {\r
if (ProcessorNumber == CallerNumber) {\r
continue;\r
}\r
if (CpuMpData->CpuData[ProcessorNumber].Waiting) {\r
- WakeUpAP (CpuMpData, FALSE, ProcessorNumber, Procedure, ProcedureArgument);\r
+ WakeUpAP (CpuMpData, FALSE, ProcessorNumber, Procedure, ProcedureArgument, TRUE);\r
break;\r
}\r
}\r
CpuData->ExpectedTime = CalculateTimeout (TimeoutInMicroseconds, &CpuData->CurrentTime);\r
CpuData->TotalTime = 0;\r
\r
- WakeUpAP (CpuMpData, FALSE, ProcessorNumber, Procedure, ProcedureArgument);\r
+ WakeUpAP (CpuMpData, FALSE, ProcessorNumber, Procedure, ProcedureArgument, TRUE);\r
\r
//\r
// If WaitEvent is NULL, execute in blocking mode.\r
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