return Enabled;\r
}\r
\r
+/**\r
+ Get CPU Package/Core/Thread location information.\r
+\r
+ @param[in] InitialApicId CPU APIC ID\r
+ @param[out] Location Pointer to CPU location information\r
+**/\r
+VOID\r
+ExtractProcessorLocation (\r
+ IN UINT32 InitialApicId,\r
+ OUT EFI_CPU_PHYSICAL_LOCATION *Location\r
+ )\r
+{\r
+ BOOLEAN TopologyLeafSupported;\r
+ UINTN ThreadBits;\r
+ UINTN CoreBits;\r
+ CPUID_VERSION_INFO_EBX VersionInfoEbx;\r
+ CPUID_VERSION_INFO_EDX VersionInfoEdx;\r
+ CPUID_CACHE_PARAMS_EAX CacheParamsEax;\r
+ CPUID_EXTENDED_TOPOLOGY_EAX ExtendedTopologyEax;\r
+ CPUID_EXTENDED_TOPOLOGY_EBX ExtendedTopologyEbx;\r
+ CPUID_EXTENDED_TOPOLOGY_ECX ExtendedTopologyEcx;\r
+ UINT32 MaxCpuIdIndex;\r
+ UINT32 SubIndex;\r
+ UINTN LevelType;\r
+ UINT32 MaxLogicProcessorsPerPackage;\r
+ UINT32 MaxCoresPerPackage;\r
+\r
+ //\r
+ // Check if the processor is capable of supporting more than one logical processor.\r
+ //\r
+ AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &VersionInfoEdx.Uint32);\r
+ if (VersionInfoEdx.Bits.HTT == 0) {\r
+ Location->Thread = 0;\r
+ Location->Core = 0;\r
+ Location->Package = 0;\r
+ return;\r
+ }\r
+\r
+ ThreadBits = 0;\r
+ CoreBits = 0;\r
+\r
+ //\r
+ // Assume three-level mapping of APIC ID: Package:Core:SMT.\r
+ //\r
+\r
+ TopologyLeafSupported = FALSE;\r
+ //\r
+ // Get the max index of basic CPUID\r
+ //\r
+ AsmCpuid (CPUID_SIGNATURE, &MaxCpuIdIndex, NULL, NULL, NULL);\r
+\r
+ //\r
+ // If the extended topology enumeration leaf is available, it\r
+ // is the preferred mechanism for enumerating topology.\r
+ //\r
+ if (MaxCpuIdIndex >= CPUID_EXTENDED_TOPOLOGY) {\r
+ AsmCpuidEx (\r
+ CPUID_EXTENDED_TOPOLOGY,\r
+ 0,\r
+ &ExtendedTopologyEax.Uint32,\r
+ &ExtendedTopologyEbx.Uint32,\r
+ &ExtendedTopologyEcx.Uint32,\r
+ NULL\r
+ );\r
+ //\r
+ // If CPUID.(EAX=0BH, ECX=0H):EBX returns zero and maximum input value for\r
+ // basic CPUID information is greater than 0BH, then CPUID.0BH leaf is not\r
+ // supported on that processor.\r
+ //\r
+ if (ExtendedTopologyEbx.Uint32 != 0) {\r
+ TopologyLeafSupported = TRUE;\r
+\r
+ //\r
+ // Sub-leaf index 0 (ECX= 0 as input) provides enumeration parameters to extract\r
+ // the SMT sub-field of x2APIC ID.\r
+ //\r
+ LevelType = ExtendedTopologyEcx.Bits.LevelType;\r
+ ASSERT (LevelType == CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_SMT);\r
+ ThreadBits = ExtendedTopologyEax.Bits.ApicIdShift;\r
+\r
+ //\r
+ // Software must not assume any "level type" encoding\r
+ // value to be related to any sub-leaf index, except sub-leaf 0.\r
+ //\r
+ SubIndex = 1;\r
+ do {\r
+ AsmCpuidEx (\r
+ CPUID_EXTENDED_TOPOLOGY,\r
+ SubIndex,\r
+ &ExtendedTopologyEax.Uint32,\r
+ NULL,\r
+ &ExtendedTopologyEcx.Uint32,\r
+ NULL\r
+ );\r
+ LevelType = ExtendedTopologyEcx.Bits.LevelType;\r
+ if (LevelType == CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_CORE) {\r
+ CoreBits = ExtendedTopologyEax.Bits.ApicIdShift - ThreadBits;\r
+ break;\r
+ }\r
+ SubIndex++;\r
+ } while (LevelType != CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_INVALID);\r
+ }\r
+ }\r
+\r
+ if (!TopologyLeafSupported) {\r
+ AsmCpuid (CPUID_VERSION_INFO, NULL, &VersionInfoEbx.Uint32, NULL, NULL);\r
+ MaxLogicProcessorsPerPackage = VersionInfoEbx.Bits.MaximumAddressableIdsForLogicalProcessors;\r
+ if (MaxCpuIdIndex >= CPUID_CACHE_PARAMS) {\r
+ AsmCpuidEx (CPUID_CACHE_PARAMS, 0, &CacheParamsEax.Uint32, NULL, NULL, NULL);\r
+ MaxCoresPerPackage = CacheParamsEax.Bits.MaximumAddressableIdsForLogicalProcessors + 1;\r
+ } else {\r
+ //\r
+ // Must be a single-core processor.\r
+ //\r
+ MaxCoresPerPackage = 1;\r
+ }\r
+\r
+ ThreadBits = (UINTN) (HighBitSet32 (MaxLogicProcessorsPerPackage / MaxCoresPerPackage - 1) + 1);\r
+ CoreBits = (UINTN) (HighBitSet32 (MaxCoresPerPackage - 1) + 1);\r
+ }\r
+\r
+ Location->Thread = InitialApicId & ((1 << ThreadBits) - 1);\r
+ Location->Core = (InitialApicId >> ThreadBits) & ((1 << CoreBits) - 1);\r
+ Location->Package = (InitialApicId >> (ThreadBits + CoreBits));\r
+}\r
+\r
/**\r
Get the Application Processors state.\r
\r
return ApLoopMode;\r
}\r
\r
+/**\r
+ Sort the APIC ID of all processors.\r
+\r
+ This function sorts the APIC ID of all processors so that processor number is\r
+ assigned in the ascending order of APIC ID which eases MP debugging.\r
+\r
+ @param[in] CpuMpData Pointer to PEI CPU MP Data\r
+**/\r
+VOID\r
+SortApicId (\r
+ IN CPU_MP_DATA *CpuMpData\r
+ )\r
+{\r
+ UINTN Index1;\r
+ UINTN Index2;\r
+ UINTN Index3;\r
+ UINT32 ApicId;\r
+ CPU_AP_DATA CpuData;\r
+ UINT32 ApCount;\r
+ CPU_INFO_IN_HOB *CpuInfoInHob;\r
+\r
+ ApCount = CpuMpData->CpuCount - 1;\r
+\r
+ if (ApCount != 0) {\r
+ for (Index1 = 0; Index1 < ApCount; Index1++) {\r
+ Index3 = Index1;\r
+ //\r
+ // Sort key is the hardware default APIC ID\r
+ //\r
+ ApicId = CpuMpData->CpuData[Index1].ApicId;\r
+ for (Index2 = Index1 + 1; Index2 <= ApCount; Index2++) {\r
+ if (ApicId > CpuMpData->CpuData[Index2].ApicId) {\r
+ Index3 = Index2;\r
+ ApicId = CpuMpData->CpuData[Index2].ApicId;\r
+ }\r
+ }\r
+ if (Index3 != Index1) {\r
+ CopyMem (&CpuData, &CpuMpData->CpuData[Index3], sizeof (CPU_AP_DATA));\r
+ CopyMem (\r
+ &CpuMpData->CpuData[Index3],\r
+ &CpuMpData->CpuData[Index1],\r
+ sizeof (CPU_AP_DATA)\r
+ );\r
+ CopyMem (&CpuMpData->CpuData[Index1], &CpuData, sizeof (CPU_AP_DATA));\r
+ }\r
+ }\r
+\r
+ //\r
+ // Get the processor number for the BSP\r
+ //\r
+ ApicId = GetInitialApicId ();\r
+ for (Index1 = 0; Index1 < CpuMpData->CpuCount; Index1++) {\r
+ if (CpuMpData->CpuData[Index1].ApicId == ApicId) {\r
+ CpuMpData->BspNumber = (UINT32) Index1;\r
+ break;\r
+ }\r
+ }\r
+\r
+ CpuInfoInHob = (CPU_INFO_IN_HOB *) (UINTN) CpuMpData->CpuInfoInHob;\r
+ for (Index1 = 0; Index1 < CpuMpData->CpuCount; Index1++) {\r
+ CpuInfoInHob[Index1].InitialApicId = CpuMpData->CpuData[Index1].InitialApicId;\r
+ CpuInfoInHob[Index1].ApicId = CpuMpData->CpuData[Index1].ApicId;\r
+ CpuInfoInHob[Index1].Health = CpuMpData->CpuData[Index1].Health;\r
+ }\r
+ }\r
+}\r
+\r
+/**\r
+ Enable x2APIC mode on APs.\r
+\r
+ @param[in, out] Buffer Pointer to private data buffer.\r
+**/\r
+VOID\r
+EFIAPI\r
+ApFuncEnableX2Apic (\r
+ IN OUT VOID *Buffer\r
+ )\r
+{\r
+ SetApicMode (LOCAL_APIC_MODE_X2APIC);\r
+}\r
+\r
/**\r
Do sync on APs.\r
\r
return EFI_NOT_FOUND;\r
}\r
\r
+/**\r
+ This function will get CPU count in the system.\r
+\r
+ @param[in] CpuMpData Pointer to PEI CPU MP Data\r
+\r
+ @return CPU count detected\r
+**/\r
+UINTN\r
+CollectProcessorCount (\r
+ IN CPU_MP_DATA *CpuMpData\r
+ )\r
+{\r
+ //\r
+ // Send 1st broadcast IPI to APs to wakeup APs\r
+ //\r
+ CpuMpData->InitFlag = ApInitConfig;\r
+ CpuMpData->X2ApicEnable = FALSE;\r
+ WakeUpAP (CpuMpData, TRUE, 0, NULL, NULL);\r
+ //\r
+ // Wait for AP task to complete and then exit.\r
+ //\r
+ MicroSecondDelay (PcdGet32(PcdCpuApInitTimeOutInMicroSeconds));\r
+ CpuMpData->InitFlag = ApInitDone;\r
+ ASSERT (CpuMpData->CpuCount <= PcdGet32 (PcdCpuMaxLogicalProcessorNumber));\r
+ //\r
+ // Wait for all APs finished the initialization\r
+ //\r
+ while (CpuMpData->FinishedCount < (CpuMpData->CpuCount - 1)) {\r
+ CpuPause ();\r
+ }\r
+\r
+ if (CpuMpData->X2ApicEnable) {\r
+ DEBUG ((DEBUG_INFO, "Force x2APIC mode!\n"));\r
+ //\r
+ // Wakeup all APs to enable x2APIC mode\r
+ //\r
+ WakeUpAP (CpuMpData, TRUE, 0, ApFuncEnableX2Apic, NULL);\r
+ //\r
+ // Wait for all known APs finished\r
+ //\r
+ while (CpuMpData->FinishedCount < (CpuMpData->CpuCount - 1)) {\r
+ CpuPause ();\r
+ }\r
+ //\r
+ // Enable x2APIC on BSP\r
+ //\r
+ SetApicMode (LOCAL_APIC_MODE_X2APIC);\r
+ }\r
+ DEBUG ((DEBUG_INFO, "APIC MODE is %d\n", GetApicMode ()));\r
+ //\r
+ // Sort BSP/Aps by CPU APIC ID in ascending order\r
+ //\r
+ SortApicId (CpuMpData);\r
+\r
+ DEBUG ((DEBUG_INFO, "MpInitLib: Find %d processors in system.\n", CpuMpData->CpuCount));\r
+\r
+ return CpuMpData->CpuCount;\r
+}\r
+\r
/*\r
Initialize CPU AP Data when AP is wakeup at the first time.\r
\r
}\r
}\r
\r
+/**\r
+ Wait for AP wakeup and write AP start-up signal till AP is waken up.\r
+\r
+ @param[in] ApStartupSignalBuffer Pointer to AP wakeup signal\r
+**/\r
+VOID\r
+WaitApWakeup (\r
+ IN volatile UINT32 *ApStartupSignalBuffer\r
+ )\r
+{\r
+ //\r
+ // If AP is waken up, StartupApSignal should be cleared.\r
+ // Otherwise, write StartupApSignal again till AP waken up.\r
+ //\r
+ while (InterlockedCompareExchange32 (\r
+ (UINT32 *) ApStartupSignalBuffer,\r
+ WAKEUP_AP_SIGNAL,\r
+ WAKEUP_AP_SIGNAL\r
+ ) != 0) {\r
+ CpuPause ();\r
+ }\r
+}\r
+\r
/**\r
This function will fill the exchange info structure.\r
\r
AsmReadIdtr ((IA32_DESCRIPTOR *) &ExchangeInfo->IdtrProfile);\r
}\r
\r
+/**\r
+ This function will be called by BSP to wakeup AP.\r
+\r
+ @param[in] CpuMpData Pointer to CPU MP Data\r
+ @param[in] Broadcast TRUE: Send broadcast IPI to all APs\r
+ FALSE: Send IPI to AP by ApicId\r
+ @param[in] ProcessorNumber The handle number of specified processor\r
+ @param[in] Procedure The function to be invoked by AP\r
+ @param[in] ProcedureArgument The argument to be passed into AP function\r
+**/\r
+VOID\r
+WakeUpAP (\r
+ IN CPU_MP_DATA *CpuMpData,\r
+ IN BOOLEAN Broadcast,\r
+ IN UINTN ProcessorNumber,\r
+ IN EFI_AP_PROCEDURE Procedure, OPTIONAL\r
+ IN VOID *ProcedureArgument OPTIONAL\r
+ )\r
+{\r
+ volatile MP_CPU_EXCHANGE_INFO *ExchangeInfo;\r
+ UINTN Index;\r
+ CPU_AP_DATA *CpuData;\r
+ BOOLEAN ResetVectorRequired;\r
+\r
+ CpuMpData->FinishedCount = 0;\r
+ ResetVectorRequired = FALSE;\r
+\r
+ if (CpuMpData->ApLoopMode == ApInHltLoop ||\r
+ CpuMpData->InitFlag != ApInitDone) {\r
+ ResetVectorRequired = TRUE;\r
+ AllocateResetVector (CpuMpData);\r
+ FillExchangeInfoData (CpuMpData);\r
+ } else if (CpuMpData->ApLoopMode == ApInMwaitLoop) {\r
+ //\r
+ // Get AP target C-state each time when waking up AP,\r
+ // for it maybe updated by platform again\r
+ //\r
+ CpuMpData->ApTargetCState = PcdGet8 (PcdCpuApTargetCstate);\r
+ }\r
+\r
+ ExchangeInfo = CpuMpData->MpCpuExchangeInfo;\r
+\r
+ if (Broadcast) {\r
+ for (Index = 0; Index < CpuMpData->CpuCount; Index++) {\r
+ if (Index != CpuMpData->BspNumber) {\r
+ CpuData = &CpuMpData->CpuData[Index];\r
+ CpuData->ApFunction = (UINTN) Procedure;\r
+ CpuData->ApFunctionArgument = (UINTN) ProcedureArgument;\r
+ SetApState (CpuData, CpuStateReady);\r
+ if (CpuMpData->InitFlag != ApInitConfig) {\r
+ *(UINT32 *) CpuData->StartupApSignal = WAKEUP_AP_SIGNAL;\r
+ }\r
+ }\r
+ }\r
+ if (ResetVectorRequired) {\r
+ //\r
+ // Wakeup all APs\r
+ //\r
+ SendInitSipiSipiAllExcludingSelf ((UINT32) ExchangeInfo->BufferStart);\r
+ }\r
+ if (CpuMpData->InitFlag != ApInitConfig) {\r
+ //\r
+ // Wait all APs waken up if this is not the 1st broadcast of SIPI\r
+ //\r
+ for (Index = 0; Index < CpuMpData->CpuCount; Index++) {\r
+ CpuData = &CpuMpData->CpuData[Index];\r
+ if (Index != CpuMpData->BspNumber) {\r
+ WaitApWakeup (CpuData->StartupApSignal);\r
+ }\r
+ }\r
+ }\r
+ } else {\r
+ CpuData = &CpuMpData->CpuData[ProcessorNumber];\r
+ CpuData->ApFunction = (UINTN) Procedure;\r
+ CpuData->ApFunctionArgument = (UINTN) ProcedureArgument;\r
+ SetApState (CpuData, CpuStateReady);\r
+ //\r
+ // Wakeup specified AP\r
+ //\r
+ ASSERT (CpuMpData->InitFlag != ApInitConfig);\r
+ *(UINT32 *) CpuData->StartupApSignal = WAKEUP_AP_SIGNAL;\r
+ if (ResetVectorRequired) {\r
+ SendInitSipiSipi (\r
+ CpuData->ApicId,\r
+ (UINT32) ExchangeInfo->BufferStart\r
+ );\r
+ }\r
+ //\r
+ // Wait specified AP waken up\r
+ //\r
+ WaitApWakeup (CpuData->StartupApSignal);\r
+ }\r
+\r
+ if (ResetVectorRequired) {\r
+ FreeResetVector (CpuMpData);\r
+ }\r
+}\r
+\r
/**\r
MP Initialize Library initialization.\r
\r
VOID\r
)\r
{\r
+ CPU_MP_DATA *OldCpuMpData;\r
+ CPU_INFO_IN_HOB *CpuInfoInHob;\r
UINT32 MaxLogicalProcessorNumber;\r
UINT32 ApStackSize;\r
MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r
UINTN Index;\r
UINTN ApResetVectorSize;\r
UINTN BackupBufferAddr;\r
- MaxLogicalProcessorNumber = PcdGet32(PcdCpuMaxLogicalProcessorNumber);\r
+\r
+ OldCpuMpData = GetCpuMpDataFromGuidedHob ();\r
+ if (OldCpuMpData == NULL) {\r
+ MaxLogicalProcessorNumber = PcdGet32(PcdCpuMaxLogicalProcessorNumber);\r
+ } else {\r
+ MaxLogicalProcessorNumber = OldCpuMpData->CpuCount;\r
+ }\r
\r
AsmGetAddressMap (&AddressMap);\r
ApResetVectorSize = AddressMap.RendezvousFunnelSize + sizeof (MP_CPU_EXCHANGE_INFO);\r
//\r
MtrrGetAllMtrrs (&CpuMpData->MtrrTable);\r
\r
+ if (OldCpuMpData == NULL) {\r
+ //\r
+ // Wakeup all APs and calculate the processor count in system\r
+ //\r
+ CollectProcessorCount (CpuMpData);\r
+ } else {\r
+ //\r
+ // APs have been wakeup before, just get the CPU Information\r
+ // from HOB\r
+ //\r
+ CpuMpData->CpuCount = OldCpuMpData->CpuCount;\r
+ CpuMpData->BspNumber = OldCpuMpData->BspNumber;\r
+ CpuMpData->InitFlag = ApInitReconfig;\r
+ CpuInfoInHob = (CPU_INFO_IN_HOB *) (UINTN) OldCpuMpData->CpuInfoInHob;\r
+ for (Index = 0; Index < CpuMpData->CpuCount; Index++) {\r
+ InitializeSpinLock(&CpuMpData->CpuData[Index].ApLock);\r
+ CpuMpData->CpuData[Index].ApicId = CpuInfoInHob[Index].ApicId;\r
+ CpuMpData->CpuData[Index].InitialApicId = CpuInfoInHob[Index].InitialApicId;\r
+ if (CpuMpData->CpuData[Index].InitialApicId >= 255) {\r
+ CpuMpData->X2ApicEnable = TRUE;\r
+ }\r
+ CpuMpData->CpuData[Index].Health = CpuInfoInHob[Index].Health;\r
+ CpuMpData->CpuData[Index].CpuHealthy = (CpuMpData->CpuData[Index].Health == 0)? TRUE:FALSE;\r
+ CpuMpData->CpuData[Index].ApFunction = 0;\r
+ CopyMem (\r
+ &CpuMpData->CpuData[Index].VolatileRegisters,\r
+ &CpuMpData->CpuData[0].VolatileRegisters,\r
+ sizeof (CPU_VOLATILE_REGISTERS)\r
+ );\r
+ }\r
+ //\r
+ // Wakeup APs to do some AP initialize sync\r
+ //\r
+ WakeUpAP (CpuMpData, TRUE, 0, ApInitializeSync, CpuMpData);\r
+ //\r
+ // Wait for all APs finished initialization\r
+ //\r
+ while (CpuMpData->FinishedCount < (CpuMpData->CpuCount - 1)) {\r
+ CpuPause ();\r
+ }\r
+ CpuMpData->InitFlag = ApInitDone;\r
+ for (Index = 0; Index < CpuMpData->CpuCount; Index++) {\r
+ SetApState (&CpuMpData->CpuData[Index], CpuStateIdle);\r
+ }\r
+ }\r
\r
//\r
// Initialize global data for MP support\r
OUT EFI_HEALTH_FLAGS *HealthData OPTIONAL\r
)\r
{\r
- return EFI_UNSUPPORTED;\r
+ CPU_MP_DATA *CpuMpData;\r
+ UINTN CallerNumber;\r
+\r
+ CpuMpData = GetCpuMpData ();\r
+\r
+ //\r
+ // Check whether caller processor is BSP\r
+ //\r
+ MpInitLibWhoAmI (&CallerNumber);\r
+ if (CallerNumber != CpuMpData->BspNumber) {\r
+ return EFI_DEVICE_ERROR;\r
+ }\r
+\r
+ if (ProcessorInfoBuffer == NULL) {\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
+\r
+ if (ProcessorNumber >= CpuMpData->CpuCount) {\r
+ return EFI_NOT_FOUND;\r
+ }\r
+\r
+ ProcessorInfoBuffer->ProcessorId = (UINT64) CpuMpData->CpuData[ProcessorNumber].ApicId;\r
+ ProcessorInfoBuffer->StatusFlag = 0;\r
+ if (ProcessorNumber == CpuMpData->BspNumber) {\r
+ ProcessorInfoBuffer->StatusFlag |= PROCESSOR_AS_BSP_BIT;\r
+ }\r
+ if (CpuMpData->CpuData[ProcessorNumber].CpuHealthy) {\r
+ ProcessorInfoBuffer->StatusFlag |= PROCESSOR_HEALTH_STATUS_BIT;\r
+ }\r
+ if (GetApState (&CpuMpData->CpuData[ProcessorNumber]) == CpuStateDisabled) {\r
+ ProcessorInfoBuffer->StatusFlag &= ~PROCESSOR_ENABLED_BIT;\r
+ } else {\r
+ ProcessorInfoBuffer->StatusFlag |= PROCESSOR_ENABLED_BIT;\r
+ }\r
+\r
+ //\r
+ // Get processor location information\r
+ //\r
+ ExtractProcessorLocation (CpuMpData->CpuData[ProcessorNumber].ApicId, &ProcessorInfoBuffer->Location);\r
+\r
+ if (HealthData != NULL) {\r
+ HealthData->Uint32 = CpuMpData->CpuData[ProcessorNumber].Health;\r
+ }\r
+\r
+ return EFI_SUCCESS;\r
}\r
+\r
+\r
/**\r
This return the handle number for the calling processor. This service may be\r
called from the BSP and APs.\r
OUT UINTN *ProcessorNumber\r
)\r
{\r
- return EFI_UNSUPPORTED;\r
+ CPU_MP_DATA *CpuMpData;\r
+\r
+ if (ProcessorNumber == NULL) {\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
+\r
+ CpuMpData = GetCpuMpData ();\r
+\r
+ return GetProcessorNumber (CpuMpData, ProcessorNumber);\r
}\r
+\r
/**\r
Retrieves the number of logical processor in the platform and the number of\r
those logical processors that are enabled on this boot. This service may only\r
OUT UINTN *NumberOfEnabledProcessors OPTIONAL\r
)\r
{\r
- return EFI_UNSUPPORTED;\r
+ CPU_MP_DATA *CpuMpData;\r
+ UINTN CallerNumber;\r
+ UINTN ProcessorNumber;\r
+ UINTN EnabledProcessorNumber;\r
+ UINTN Index;\r
+\r
+ CpuMpData = GetCpuMpData ();\r
+\r
+ if ((NumberOfProcessors == NULL) && (NumberOfEnabledProcessors == NULL)) {\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
+\r
+ //\r
+ // Check whether caller processor is BSP\r
+ //\r
+ MpInitLibWhoAmI (&CallerNumber);\r
+ if (CallerNumber != CpuMpData->BspNumber) {\r
+ return EFI_DEVICE_ERROR;\r
+ }\r
+\r
+ ProcessorNumber = CpuMpData->CpuCount;\r
+ EnabledProcessorNumber = 0;\r
+ for (Index = 0; Index < ProcessorNumber; Index++) {\r
+ if (GetApState (&CpuMpData->CpuData[Index]) != CpuStateDisabled) {\r
+ EnabledProcessorNumber ++;\r
+ }\r
+ }\r
+\r
+ if (NumberOfProcessors != NULL) {\r
+ *NumberOfProcessors = ProcessorNumber;\r
+ }\r
+ if (NumberOfEnabledProcessors != NULL) {\r
+ *NumberOfEnabledProcessors = EnabledProcessorNumber;\r
+ }\r
+\r
+ return EFI_SUCCESS;\r
}\r
+\r
+\r
/**\r
Get pointer to CPU MP Data structure from GUIDed HOB.\r
\r
projects / mirror_edk2.git / blobdiff