/** @file\r
CPU MP Initialize Library common functions.\r
\r
- Copyright (c) 2016 - 2019, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2020, AMD Inc. All rights reserved.<BR>\r
+\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
EFI_GUID mCpuInitMpLibHobGuid = CPU_INIT_MP_LIB_HOB_GUID;\r
\r
+\r
+/**\r
+ Determine if the standard CPU signature is "AuthenticAMD".\r
+\r
+ @retval TRUE The CPU signature matches.\r
+ @retval FALSE The CPU signature does not match.\r
+\r
+**/\r
+STATIC\r
+BOOLEAN\r
+StandardSignatureIsAuthenticAMD (\r
+ VOID\r
+ )\r
+{\r
+ UINT32 RegEbx;\r
+ UINT32 RegEcx;\r
+ UINT32 RegEdx;\r
+\r
+ AsmCpuid (CPUID_SIGNATURE, NULL, &RegEbx, &RegEcx, &RegEdx);\r
+ return (RegEbx == CPUID_SIGNATURE_AUTHENTIC_AMD_EBX &&\r
+ RegEcx == CPUID_SIGNATURE_AUTHENTIC_AMD_ECX &&\r
+ RegEdx == CPUID_SIGNATURE_AUTHENTIC_AMD_EDX);\r
+}\r
+\r
/**\r
The function will check if BSP Execute Disable is enabled.\r
\r
)\r
{\r
CPU_MP_DATA *CpuMpData;\r
+ UINTN ProcessorNumber;\r
+ EFI_STATUS Status;\r
\r
CpuMpData = (CPU_MP_DATA *) Buffer;\r
+ Status = GetProcessorNumber (CpuMpData, &ProcessorNumber);\r
+ ASSERT_EFI_ERROR (Status);\r
//\r
// Load microcode on AP\r
//\r
- MicrocodeDetect (CpuMpData, FALSE);\r
+ MicrocodeDetect (CpuMpData, ProcessorNumber);\r
//\r
// Sync BSP's MTRR table to AP\r
//\r
CpuMpData->CpuData[ProcessorNumber].Waiting = FALSE;\r
CpuMpData->CpuData[ProcessorNumber].CpuHealthy = (BistData == 0) ? TRUE : FALSE;\r
\r
- PlatformIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_PLATFORM_ID);\r
- CpuMpData->CpuData[ProcessorNumber].PlatformId = (UINT8) PlatformIdMsr.Bits.PlatformId;\r
+ //\r
+ // NOTE: PlatformId is not relevant on AMD platforms.\r
+ //\r
+ if (!StandardSignatureIsAuthenticAMD ()) {\r
+ PlatformIdMsr.Uint64 = AsmReadMsr64 (MSR_IA32_PLATFORM_ID);\r
+ CpuMpData->CpuData[ProcessorNumber].PlatformId = (UINT8)PlatformIdMsr.Bits.PlatformId;\r
+ }\r
\r
AsmCpuid (\r
CPUID_VERSION_INFO,\r
CpuMpData->SwitchBspFlag = FALSE;\r
CpuMpData->CpuData = (CPU_AP_DATA *) (CpuMpData + 1);\r
CpuMpData->CpuInfoInHob = (UINT64) (UINTN) (CpuMpData->CpuData + MaxLogicalProcessorNumber);\r
- if (OldCpuMpData != NULL) {\r
- CpuMpData->MicrocodePatchRegionSize = OldCpuMpData->MicrocodePatchRegionSize;\r
- CpuMpData->MicrocodePatchAddress = OldCpuMpData->MicrocodePatchAddress;\r
- }\r
InitializeSpinLock(&CpuMpData->MpLock);\r
\r
//\r
//\r
CollectProcessorCount (CpuMpData);\r
}\r
-\r
- //\r
- // Load required microcode patches data into memory\r
- //\r
- LoadMicrocodePatch (CpuMpData);\r
} else {\r
//\r
// APs have been wakeup before, just get the CPU Information\r
}\r
}\r
\r
+ if (!GetMicrocodePatchInfoFromHob (\r
+ &CpuMpData->MicrocodePatchAddress,\r
+ &CpuMpData->MicrocodePatchRegionSize\r
+ )) {\r
+ //\r
+ // The microcode patch information cache HOB does not exist, which means\r
+ // the microcode patches data has not been loaded into memory yet\r
+ //\r
+ ShadowMicrocodeUpdatePatch (CpuMpData);\r
+ }\r
+\r
//\r
// Detect and apply Microcode on BSP\r
//\r
- MicrocodeDetect (CpuMpData, TRUE);\r
+ MicrocodeDetect (CpuMpData, CpuMpData->BspNumber);\r
//\r
// Store BSP's MTRR setting\r
//\r
// Wakeup APs to do some AP initialize sync (Microcode & MTRR)\r
//\r
if (CpuMpData->CpuCount > 1) {\r
+ CpuMpData->InitFlag = ApInitReconfig;\r
WakeUpAP (CpuMpData, TRUE, 0, ApInitializeSync, CpuMpData, TRUE);\r
+ //\r
+ // Wait for all APs finished initialization\r
+ //\r
while (CpuMpData->FinishedCount < (CpuMpData->CpuCount - 1)) {\r
CpuPause ();\r
}\r
-\r
+ CpuMpData->InitFlag = ApInitDone;\r
for (Index = 0; Index < CpuMpData->CpuCount; Index++) {\r
SetApState (&CpuMpData->CpuData[Index], CpuStateIdle);\r
}\r