UefiCpuPkg/MpInitLib: Relocate microcode patch fields in CPU_MP_DATA

[mirror_edk2.git] / UefiCpuPkg / Library / MpInitLib / MpLib.h

diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpInitLib/MpLib.h
index 75f3fdda1d84148177d92afc0926f1f5cf7f12db..5f50e79744cb506bedb834b36b440d39b646feef 100644 (file)
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.h
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h
@@ -1,14 +1,8 @@
 /** @file\r
   Common header file for MP Initialize Library.\r
 \r
-  Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>\r
-  This program and the accompanying materials\r
-  are licensed and made available under the terms and conditions of the BSD License\r
-  which accompanies this distribution.  The full text of the license may be found at\r
-  http://opensource.org/licenses/bsd-license.php\r
-\r
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+  Copyright (c) 2016 - 2019, Intel Corporation. All rights reserved.<BR>\r
+  SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
 \r
@@ -17,10 +11,10 @@
 \r
 #include <PiPei.h>\r
 \r
-#include <Register/Cpuid.h>\r
-#include <Register/Msr.h>\r
-#include <Register/LocalApic.h>\r
-#include <Register/Microcode.h>\r
+#include <Register/Intel/Cpuid.h>\r
+#include <Register/Intel/Msr.h>\r
+#include <Register/Intel/LocalApic.h>\r
+#include <Register/Intel/Microcode.h>\r
 \r
 #include <Library/MpInitLib.h>\r
 #include <Library/BaseLib.h>\r
@@ -49,6 +43,20 @@
 #define CPU_SWITCH_STATE_STORED 1\r
 #define CPU_SWITCH_STATE_LOADED 2\r
 \r
+//\r
+// Default maximum number of entries to store the microcode patches information\r
+//\r
+#define DEFAULT_MAX_MICROCODE_PATCH_NUM 8\r
+\r
+//\r
+// Data structure for microcode patch information\r
+//\r
+typedef struct {\r
+  UINTN    Address;\r
+  UINTN    Size;\r
+  UINTN    AlignedSize;\r
+} MICROCODE_PATCH_INFO;\r
+\r
 //\r
 // CPU exchange information for switch BSP\r
 //\r
@@ -89,6 +97,7 @@ typedef enum {
   CpuStateIdle,\r
   CpuStateReady,\r
   CpuStateBusy,\r
+  CpuStateFinished,\r
   CpuStateDisabled\r
 } CPU_STATE;\r
 \r
@@ -127,6 +136,9 @@ typedef struct {
   UINT64                         CurrentTime;\r
   UINT64                         TotalTime;\r
   EFI_EVENT                      WaitEvent;\r
+  UINT32                         ProcessorSignature;\r
+  UINT8                          PlatformId;\r
+  UINT64                         MicrocodeEntryAddr;\r
 } CPU_AP_DATA;\r
 \r
 //\r
@@ -190,6 +202,10 @@ typedef struct {
   UINT16                ModeTransitionSegment;\r
   UINT32                ModeHighMemory;\r
   UINT16                ModeHighSegment;\r
+  //\r
+  // Enable5LevelPaging indicates whether 5-level paging is enabled in long mode.\r
+  //\r
+  BOOLEAN               Enable5LevelPaging;\r
 } MP_CPU_EXCHANGE_INFO;\r
 \r
 #pragma pack()\r
@@ -201,6 +217,8 @@ struct _CPU_MP_DATA {
   UINT64                         CpuInfoInHob;\r
   UINT32                         CpuCount;\r
   UINT32                         BspNumber;\r
+  UINT64                         MicrocodePatchAddress;\r
+  UINT64                         MicrocodePatchRegionSize;\r
   //\r
   // The above fields data will be passed from PEI to DXE\r
   // Please make sure the fields offset same in the different\r
@@ -228,7 +246,6 @@ struct _CPU_MP_DATA {
   UINTN                          **FailedCpuList;\r
 \r
   AP_INIT_STATE                  InitFlag;\r
-  BOOLEAN                        X2ApicEnable;\r
   BOOLEAN                        SwitchBspFlag;\r
   UINTN                          NewBspNumber;\r
   CPU_EXCHANGE_ROLE_INFO         BSPInfo;\r
@@ -245,8 +262,6 @@ struct _CPU_MP_DATA {
   UINT8                          Vector;\r
   BOOLEAN                        PeriodicMode;\r
   BOOLEAN                        TimerInterruptState;\r
-  UINT64                         MicrocodePatchAddress;\r
-  UINT64                         MicrocodePatchRegionSize;\r
 \r
   UINT32                         ProcessorSignature;\r
   UINT32                         ProcessorFlags;\r
@@ -257,7 +272,7 @@ struct _CPU_MP_DATA {
   // Whether need to use Init-Sipi-Sipi to wake up the APs.\r
   // Two cases need to set this value to TRUE. One is in HLT\r
   // loop mode, the other is resume from S3 which loop mode\r
-  // will be hardcode change to HLT mode by PiSmmCpuDxeSmm \r
+  // will be hardcode change to HLT mode by PiSmmCpuDxeSmm\r
   // driver.\r
   //\r
   BOOLEAN                        WakeUpByInitSipiSipi;\r
@@ -410,6 +425,7 @@ InitMpGlobalData (
                                       number.  If FALSE, then all the enabled APs\r
                                       execute the function specified by Procedure\r
                                       simultaneously.\r
+  @param[in]  ExcludeBsp              Whether let BSP also trig this task.\r
   @param[in]  WaitEvent               The event created by the caller with CreateEvent()\r
                                       service.\r
   @param[in]  TimeoutInMicroseconds   Indicates the time limit in microseconds for\r
@@ -431,9 +447,10 @@ InitMpGlobalData (
 \r
 **/\r
 EFI_STATUS\r
-StartupAllAPsWorker (\r
+StartupAllCPUsWorker (\r
   IN  EFI_AP_PROCEDURE          Procedure,\r
   IN  BOOLEAN                   SingleThread,\r
+  IN  BOOLEAN                   ExcludeBsp,\r
   IN  EFI_EVENT                 WaitEvent               OPTIONAL,\r
   IN  UINTN                     TimeoutInMicroseconds,\r
   IN  VOID                      *ProcedureArgument      OPTIONAL,\r
@@ -564,13 +581,25 @@ CheckAndUpdateApsStatus (
 /**\r
   Detect whether specified processor can find matching microcode patch and load it.\r
 \r
-  @param[in]  CpuMpData    The pointer to CPU MP Data structure.\r
-  @param[in]  IsBspCallIn  Indicate whether the caller is BSP or not.\r
+  @param[in]  CpuMpData        The pointer to CPU MP Data structure.\r
+  @param[in]  ProcessorNumber  The handle number of the processor. The range is\r
+                               from 0 to the total number of logical processors\r
+                               minus 1.\r
 **/\r
 VOID\r
 MicrocodeDetect (\r
   IN CPU_MP_DATA             *CpuMpData,\r
-  IN BOOLEAN                 IsBspCallIn\r
+  IN UINTN                   ProcessorNumber\r
+  );\r
+\r
+/**\r
+  Load the required microcode patches data into memory.\r
+\r
+  @param[in, out]  CpuMpData    The pointer to CPU MP Data structure.\r
+**/\r
+VOID\r
+LoadMicrocodePatch (\r
+  IN OUT CPU_MP_DATA             *CpuMpData\r
   );\r
 \r
 /**\r
@@ -593,5 +622,20 @@ EnableDebugAgent (
   VOID\r
   );\r
 \r
+/**\r
+  Find the current Processor number by APIC ID.\r
+\r
+  @param[in]  CpuMpData         Pointer to PEI CPU MP Data\r
+  @param[out] ProcessorNumber   Return the pocessor number found\r
+\r
+  @retval EFI_SUCCESS          ProcessorNumber is found and returned.\r
+  @retval EFI_NOT_FOUND        ProcessorNumber is not found.\r
+**/\r
+EFI_STATUS\r
+GetProcessorNumber (\r
+  IN CPU_MP_DATA               *CpuMpData,\r
+  OUT UINTN                    *ProcessorNumber\r
+  );\r
+\r
 #endif\r
 \r