UefiCpuPkg/MtrrLib/UnitTest: Add host based unit test

[mirror_edk2.git] / UefiCpuPkg / Library / MtrrLib / UnitTest / MtrrLibUnitTest.h

diff --git a/UefiCpuPkg/Library/MtrrLib/UnitTest/MtrrLibUnitTest.h b/UefiCpuPkg/Library/MtrrLib/UnitTest/MtrrLibUnitTest.h
new file mode 100644 (file)
index 0000000..9750523
--- /dev/null
+++ b/UefiCpuPkg/Library/MtrrLib/UnitTest/MtrrLibUnitTest.h
@@ -0,0 +1,182 @@
+/** @file\r
+\r
+  Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>\r
+  SPDX-License-Identifier: BSD-2-Clause-Patent\r
+\r
+**/\r
+\r
+#ifndef _MTRR_SUPPORT_H_\r
+#define _MTRR_SUPPORT_H_\r
+\r
+#include <stdio.h>\r
+#include <stdlib.h>\r
+#include <string.h>\r
+#include <stdarg.h>\r
+#include <stddef.h>\r
+#include <setjmp.h>\r
+#include <cmocka.h>\r
+#include <time.h>\r
+\r
+#include <Uefi.h>\r
+#include <Library/BaseLib.h>\r
+#include <Library/BaseMemoryLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/UnitTestLib.h>\r
+#include <Library/MtrrLib.h>\r
+#include <Library/UnitTestHostBaseLib.h>\r
+\r
+#include <Register/ArchitecturalMsr.h>\r
+#include <Register/Cpuid.h>\r
+#include <Register/Msr.h>\r
+\r
+#define UNIT_TEST_APP_NAME        "MtrrLib Unit Tests"\r
+#define UNIT_TEST_APP_VERSION     "1.0"\r
+\r
+#define SCRATCH_BUFFER_SIZE       SIZE_16KB\r
+\r
+typedef struct {\r
+  UINT8                  PhysicalAddressBits;\r
+  BOOLEAN                MtrrSupported;\r
+  BOOLEAN                FixedMtrrSupported;\r
+  MTRR_MEMORY_CACHE_TYPE DefaultCacheType;\r
+  UINT32                 VariableMtrrCount;\r
+} MTRR_LIB_SYSTEM_PARAMETER;\r
+\r
+extern UINT32                           mFixedMtrrsIndex[];\r
+\r
+/**\r
+  Initialize the MTRR registers.\r
+\r
+  @param SystemParameter System parameter that controls the MTRR registers initialization.\r
+**/\r
+UNIT_TEST_STATUS\r
+EFIAPI\r
+InitializeMtrrRegs (\r
+  IN MTRR_LIB_SYSTEM_PARAMETER  *SystemParameter\r
+  );\r
+\r
+/**\r
+  Initialize the MTRR registers.\r
+\r
+  @param Context System parameter that controls the MTRR registers initialization.\r
+**/\r
+UNIT_TEST_STATUS\r
+EFIAPI\r
+InitializeSystem (\r
+  IN UNIT_TEST_CONTEXT        Context\r
+  );\r
+\r
+/**\r
+  Return a random memory cache type.\r
+**/\r
+MTRR_MEMORY_CACHE_TYPE\r
+GenerateRandomCacheType (\r
+  VOID\r
+  );\r
+\r
+/**\r
+  Generate random MTRRs.\r
+\r
+  @param PhysicalAddressBits  Physical address bits.\r
+  @param RawMemoryRanges      Return the randomly generated MTRRs.\r
+  @param UcCount              Count of Uncacheable MTRRs.\r
+  @param WtCount              Count of Write Through MTRRs.\r
+  @param WbCount              Count of Write Back MTRRs.\r
+  @param WpCount              Count of Write Protected MTRRs.\r
+  @param WcCount              Count of Write Combining MTRRs.\r
+**/\r
+VOID\r
+GenerateValidAndConfigurableMtrrPairs (\r
+  IN     UINT32                    PhysicalAddressBits,\r
+  IN OUT MTRR_MEMORY_RANGE         *RawMemoryRanges,\r
+  IN     UINT32                    UcCount,\r
+  IN     UINT32                    WtCount,\r
+  IN     UINT32                    WbCount,\r
+  IN     UINT32                    WpCount,\r
+  IN     UINT32                    WcCount\r
+  );\r
+\r
+/**\r
+  Convert the MTRR BASE/MASK array to memory ranges.\r
+\r
+  @param DefaultType          Default memory type.\r
+  @param PhysicalAddressBits  Physical address bits.\r
+  @param RawMemoryRanges      Raw memory ranges.\r
+  @param RawMemoryRangeCount  Count of raw memory ranges.\r
+  @param MemoryRanges         Memory ranges.\r
+  @param MemoryRangeCount     Count of memory ranges.\r
+**/\r
+VOID\r
+GetEffectiveMemoryRanges (\r
+  IN MTRR_MEMORY_CACHE_TYPE DefaultType,\r
+  IN UINT32                 PhysicalAddressBits,\r
+  IN MTRR_MEMORY_RANGE      *RawMemoryRanges,\r
+  IN UINT32                 RawMemoryRangeCount,\r
+  OUT MTRR_MEMORY_RANGE     *MemoryRanges,\r
+  OUT UINTN                 *MemoryRangeCount\r
+  );\r
+\r
+/**\r
+  Generate random MTRR BASE/MASK for a specified type.\r
+\r
+  @param PhysicalAddressBits Physical address bits.\r
+  @param CacheType           Cache type.\r
+  @param MtrrPair            Return the random MTRR.\r
+  @param MtrrMemoryRange     Return the random memory range.\r
+**/\r
+VOID\r
+GenerateRandomMtrrPair (\r
+  IN  UINT32                 PhysicalAddressBits,\r
+  IN  MTRR_MEMORY_CACHE_TYPE CacheType,\r
+  OUT MTRR_VARIABLE_SETTING  *MtrrPair,       OPTIONAL\r
+  OUT MTRR_MEMORY_RANGE      *MtrrMemoryRange OPTIONAL\r
+  );\r
+\r
+/**\r
+  Collect the test result.\r
+\r
+  @param DefaultType          Default memory type.\r
+  @param PhysicalAddressBits  Physical address bits.\r
+  @param VariableMtrrCount    Count of variable MTRRs.\r
+  @param Mtrrs                MTRR settings to collect from.\r
+  @param Ranges               Return the memory ranges.\r
+  @param RangeCount           Return the count of memory ranges.\r
+  @param MtrrCount            Return the count of variable MTRRs being used.\r
+**/\r
+VOID\r
+CollectTestResult (\r
+  IN     MTRR_MEMORY_CACHE_TYPE DefaultType,\r
+  IN     UINT32                 PhysicalAddressBits,\r
+  IN     UINT32                 VariableMtrrCount,\r
+  IN     MTRR_SETTINGS          *Mtrrs,\r
+  OUT    MTRR_MEMORY_RANGE      *Ranges,\r
+  IN OUT UINTN                  *RangeCount,\r
+  OUT    UINT32                 *MtrrCount\r
+  );\r
+\r
+/**\r
+  Return a 64bit random number.\r
+\r
+  @param Start  Start of the random number range.\r
+  @param Limit  Limit of the random number range.\r
+  @return 64bit random number\r
+**/\r
+UINT64\r
+Random64 (\r
+  UINT64  Start,\r
+  UINT64  Limit\r
+  );\r
+\r
+/**\r
+  Return a 32bit random number.\r
+\r
+  @param Start  Start of the random number range.\r
+  @param Limit  Limit of the random number range.\r
+  @return 32bit random number\r
+**/\r
+UINT32\r
+Random32 (\r
+  UINT32  Start,\r
+  UINT32  Limit\r
+  );\r
+#endif\r