--- /dev/null
+/** @file\r
+Implementation of SMM CPU Services Protocol.\r
+\r
+Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution. The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
+\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include "PiSmmCpuDxeSmm.h"\r
+\r
+//\r
+// SMM CPU Service Protocol instance\r
+//\r
+EFI_SMM_CPU_SERVICE_PROTOCOL mSmmCpuService = {\r
+ SmmGetProcessorInfo,\r
+ SmmSwitchBsp,\r
+ SmmAddProcessor,\r
+ SmmRemoveProcessor,\r
+ SmmWhoAmI,\r
+ SmmRegisterExceptionHandler\r
+};\r
+\r
+/**\r
+ Get Package ID/Core ID/Thread ID of a processor.\r
+\r
+ APIC ID must be an initial APIC ID.\r
+\r
+ The algorithm below assumes the target system has symmetry across physical package boundaries\r
+ with respect to the number of logical processors per package, number of cores per package.\r
+\r
+ @param ApicId APIC ID of the target logical processor.\r
+ @param Location Returns the processor location information.\r
+**/\r
+VOID\r
+SmmGetProcessorLocation (\r
+ IN UINT32 ApicId,\r
+ OUT EFI_CPU_PHYSICAL_LOCATION *Location\r
+ )\r
+{\r
+ UINTN ThreadBits;\r
+ UINTN CoreBits;\r
+ UINT32 RegEax;\r
+ UINT32 RegEbx;\r
+ UINT32 RegEcx;\r
+ UINT32 RegEdx;\r
+ UINT32 MaxCpuIdIndex;\r
+ UINT32 SubIndex;\r
+ UINTN LevelType;\r
+ UINT32 MaxLogicProcessorsPerPackage;\r
+ UINT32 MaxCoresPerPackage;\r
+ BOOLEAN TopologyLeafSupported;\r
+\r
+ ASSERT (Location != NULL);\r
+\r
+ ThreadBits = 0;\r
+ CoreBits = 0;\r
+ TopologyLeafSupported = FALSE;\r
+\r
+ //\r
+ // Check if the processor is capable of supporting more than one logical processor.\r
+ //\r
+ AsmCpuid (CPUID_VERSION_INFO, NULL, NULL, NULL, &RegEdx);\r
+ ASSERT ((RegEdx & BIT28) != 0);\r
+\r
+ //\r
+ // Assume three-level mapping of APIC ID: Package:Core:SMT.\r
+ //\r
+\r
+ //\r
+ // Get the max index of basic CPUID\r
+ //\r
+ AsmCpuid (CPUID_SIGNATURE, &MaxCpuIdIndex, NULL, NULL, NULL);\r
+\r
+ //\r
+ // If the extended topology enumeration leaf is available, it\r
+ // is the preferred mechanism for enumerating topology.\r
+ //\r
+ if (MaxCpuIdIndex >= CPUID_EXTENDED_TOPOLOGY) {\r
+ AsmCpuidEx (CPUID_EXTENDED_TOPOLOGY, 0, &RegEax, &RegEbx, &RegEcx, NULL);\r
+ //\r
+ // If CPUID.(EAX=0BH, ECX=0H):EBX returns zero and maximum input value for\r
+ // basic CPUID information is greater than 0BH, then CPUID.0BH leaf is not\r
+ // supported on that processor.\r
+ //\r
+ if ((RegEbx & 0xffff) != 0) {\r
+ TopologyLeafSupported = TRUE;\r
+\r
+ //\r
+ // Sub-leaf index 0 (ECX= 0 as input) provides enumeration parameters to extract\r
+ // the SMT sub-field of x2APIC ID.\r
+ //\r
+ LevelType = (RegEcx >> 8) & 0xff;\r
+ ASSERT (LevelType == CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_SMT);\r
+ if ((RegEbx & 0xffff) > 1 ) {\r
+ ThreadBits = RegEax & 0x1f;\r
+ } else {\r
+ //\r
+ // HT is not supported\r
+ //\r
+ ThreadBits = 0;\r
+ }\r
+\r
+ //\r
+ // Software must not assume any "level type" encoding\r
+ // value to be related to any sub-leaf index, except sub-leaf 0.\r
+ //\r
+ SubIndex = 1;\r
+ do {\r
+ AsmCpuidEx (CPUID_EXTENDED_TOPOLOGY, SubIndex, &RegEax, NULL, &RegEcx, NULL);\r
+ LevelType = (RegEcx >> 8) & 0xff;\r
+ if (LevelType == CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_CORE) {\r
+ CoreBits = (RegEax & 0x1f) - ThreadBits;\r
+ break;\r
+ }\r
+ SubIndex++;\r
+ } while (LevelType != CPUID_EXTENDED_TOPOLOGY_LEVEL_TYPE_INVALID);\r
+ }\r
+ }\r
+\r
+ if (!TopologyLeafSupported) {\r
+ AsmCpuid (CPUID_VERSION_INFO, NULL, &RegEbx, NULL, NULL);\r
+ MaxLogicProcessorsPerPackage = (RegEbx >> 16) & 0xff;\r
+ if (MaxCpuIdIndex >= CPUID_CACHE_PARAMS) {\r
+ AsmCpuidEx (CPUID_CACHE_PARAMS, 0, &RegEax, NULL, NULL, NULL);\r
+ MaxCoresPerPackage = (RegEax >> 26) + 1;\r
+ } else {\r
+ //\r
+ // Must be a single-core processor.\r
+ //\r
+ MaxCoresPerPackage = 1;\r
+ }\r
+\r
+ ThreadBits = (UINTN) (HighBitSet32 (MaxLogicProcessorsPerPackage / MaxCoresPerPackage - 1) + 1);\r
+ CoreBits = (UINTN) (HighBitSet32 (MaxCoresPerPackage - 1) + 1);\r
+ }\r
+\r
+ Location->Thread = ApicId & ~((-1) << ThreadBits);\r
+ Location->Core = (ApicId >> ThreadBits) & ~((-1) << CoreBits);\r
+ Location->Package = (ApicId >> (ThreadBits+ CoreBits));\r
+}\r
+\r
+/**\r
+ Gets processor information on the requested processor at the instant this call is made.\r
+\r
+ @param[in] This A pointer to the EFI_SMM_CPU_SERVICE_PROTOCOL instance.\r
+ @param[in] ProcessorNumber The handle number of processor.\r
+ @param[out] ProcessorInfoBuffer A pointer to the buffer where information for\r
+ the requested processor is deposited.\r
+\r
+ @retval EFI_SUCCESS Processor information was returned.\r
+ @retval EFI_INVALID_PARAMETER ProcessorInfoBuffer is NULL.\r
+ @retval EFI_INVALID_PARAMETER ProcessorNumber is invalid.\r
+ @retval EFI_NOT_FOUND The processor with the handle specified by\r
+ ProcessorNumber does not exist in the platform.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+SmmGetProcessorInfo (\r
+ IN CONST EFI_SMM_CPU_SERVICE_PROTOCOL *This,\r
+ IN UINTN ProcessorNumber,\r
+ OUT EFI_PROCESSOR_INFORMATION *ProcessorInfoBuffer\r
+ )\r
+{\r
+ //\r
+ // Check parameter\r
+ //\r
+ if (ProcessorNumber >= mMaxNumberOfCpus || ProcessorInfoBuffer == NULL) {\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
+\r
+ if (gSmmCpuPrivate->ProcessorInfo[ProcessorNumber].ProcessorId == INVALID_APIC_ID) {\r
+ return EFI_NOT_FOUND;\r
+ }\r
+\r
+ //\r
+ // Fill in processor information\r
+ //\r
+ CopyMem (ProcessorInfoBuffer, &gSmmCpuPrivate->ProcessorInfo[ProcessorNumber], sizeof (EFI_PROCESSOR_INFORMATION));\r
+ return EFI_SUCCESS;\r
+}\r
+\r
+/**\r
+ This service switches the requested AP to be the BSP since the next SMI.\r
+\r
+ @param[in] This A pointer to the EFI_SMM_CPU_SERVICE_PROTOCOL instance.\r
+ @param[in] ProcessorNumber The handle number of AP that is to become the new BSP.\r
+\r
+ @retval EFI_SUCCESS BSP will be switched in next SMI.\r
+ @retval EFI_UNSUPPORTED Switching the BSP or a processor to be hot-removed is not supported.\r
+ @retval EFI_NOT_FOUND The processor with the handle specified by ProcessorNumber does not exist.\r
+ @retval EFI_INVALID_PARAMETER ProcessorNumber is invalid.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+SmmSwitchBsp (\r
+ IN CONST EFI_SMM_CPU_SERVICE_PROTOCOL *This,\r
+ IN UINTN ProcessorNumber\r
+ )\r
+{\r
+ //\r
+ // Check parameter\r
+ //\r
+ if (ProcessorNumber >= mMaxNumberOfCpus) {\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
+\r
+ if (gSmmCpuPrivate->ProcessorInfo[ProcessorNumber].ProcessorId == INVALID_APIC_ID) {\r
+ return EFI_NOT_FOUND;\r
+ }\r
+\r
+ if (gSmmCpuPrivate->Operation[ProcessorNumber] != SmmCpuNone ||\r
+ gSmst->CurrentlyExecutingCpu == ProcessorNumber) {\r
+ return EFI_UNSUPPORTED;\r
+ }\r
+\r
+ //\r
+ // Setting of the BSP for next SMI is pending until all SMI handlers are finished\r
+ //\r
+ gSmmCpuPrivate->Operation[ProcessorNumber] = SmmCpuSwitchBsp;\r
+ return EFI_SUCCESS;\r
+}\r
+\r
+/**\r
+ Notify that a processor was hot-added.\r
+\r
+ @param[in] This A pointer to the EFI_SMM_CPU_SERVICE_PROTOCOL instance.\r
+ @param[in] ProcessorId Local APIC ID of the hot-added processor.\r
+ @param[out] ProcessorNumber The handle number of the hot-added processor.\r
+\r
+ @retval EFI_SUCCESS The hot-addition of the specified processors was successfully notified.\r
+ @retval EFI_UNSUPPORTED Hot addition of processor is not supported.\r
+ @retval EFI_NOT_FOUND The processor with the handle specified by ProcessorNumber does not exist.\r
+ @retval EFI_INVALID_PARAMETER ProcessorNumber is invalid.\r
+ @retval EFI_ALREADY_STARTED The processor is already online in the system.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+SmmAddProcessor (\r
+ IN CONST EFI_SMM_CPU_SERVICE_PROTOCOL *This,\r
+ IN UINT64 ProcessorId,\r
+ OUT UINTN *ProcessorNumber\r
+ )\r
+{\r
+ UINTN Index;\r
+\r
+ if (!FeaturePcdGet (PcdCpuHotPlugSupport)) {\r
+ return EFI_UNSUPPORTED;\r
+ }\r
+\r
+ //\r
+ // Check parameter\r
+ //\r
+ if (ProcessorNumber == NULL || ProcessorId == INVALID_APIC_ID) {\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
+\r
+ //\r
+ // Check if the processor already exists\r
+ //\r
+\r
+ for (Index = 0; Index < mMaxNumberOfCpus; Index++) {\r
+ if (gSmmCpuPrivate->ProcessorInfo[Index].ProcessorId == ProcessorId) {\r
+ return EFI_ALREADY_STARTED;\r
+ }\r
+ }\r
+\r
+ //\r
+ // Check CPU hot plug data. The CPU RAS handler should have created the mapping\r
+ // of the APIC ID to SMBASE.\r
+ //\r
+ for (Index = 0; Index < mMaxNumberOfCpus; Index++) {\r
+ if (mCpuHotPlugData.ApicId[Index] == ProcessorId &&\r
+ gSmmCpuPrivate->ProcessorInfo[Index].ProcessorId == INVALID_APIC_ID) {\r
+ gSmmCpuPrivate->ProcessorInfo[Index].ProcessorId = ProcessorId;\r
+ gSmmCpuPrivate->ProcessorInfo[Index].StatusFlag = 0;\r
+ SmmGetProcessorLocation ((UINT32)ProcessorId, &gSmmCpuPrivate->ProcessorInfo[Index].Location);\r
+\r
+ *ProcessorNumber = Index;\r
+ gSmmCpuPrivate->Operation[Index] = SmmCpuAdd;\r
+ return EFI_SUCCESS;\r
+ }\r
+ }\r
+\r
+ return EFI_INVALID_PARAMETER;\r
+}\r
+\r
+/**\r
+ Notify that a processor was hot-removed.\r
+\r
+ @param[in] This A pointer to the EFI_SMM_CPU_SERVICE_PROTOCOL instance.\r
+ @param[in] ProcessorNumber The handle number of the hot-added processor.\r
+\r
+ @retval EFI_SUCCESS The hot-removal of the specified processors was successfully notified.\r
+ @retval EFI_UNSUPPORTED Hot removal of processor is not supported.\r
+ @retval EFI_UNSUPPORTED Hot removal of BSP is not supported.\r
+ @retval EFI_UNSUPPORTED Hot removal of a processor with pending hot-plug operation is not supported.\r
+ @retval EFI_INVALID_PARAMETER ProcessorNumber is invalid.\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+SmmRemoveProcessor (\r
+ IN CONST EFI_SMM_CPU_SERVICE_PROTOCOL *This,\r
+ IN UINTN ProcessorNumber\r
+ )\r
+{\r
+ if (!FeaturePcdGet (PcdCpuHotPlugSupport)) {\r
+ return EFI_UNSUPPORTED;\r
+ }\r
+\r
+ //\r
+ // Check parameter\r
+ //\r
+ if (ProcessorNumber >= mMaxNumberOfCpus ||\r
+ gSmmCpuPrivate->ProcessorInfo[ProcessorNumber].ProcessorId == INVALID_APIC_ID) {\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
+\r
+ //\r
+ // Can't remove BSP\r
+ //\r
+ if (ProcessorNumber == gSmmCpuPrivate->SmmCoreEntryContext.CurrentlyExecutingCpu) {\r
+ return EFI_UNSUPPORTED;\r
+ }\r
+\r
+ if (gSmmCpuPrivate->Operation[ProcessorNumber] != SmmCpuNone) {\r
+ return EFI_UNSUPPORTED;\r
+ }\r
+\r
+ gSmmCpuPrivate->ProcessorInfo[ProcessorNumber].ProcessorId = INVALID_APIC_ID;\r
+ mCpuHotPlugData.ApicId[ProcessorNumber] = INVALID_APIC_ID;\r
+\r
+ //\r
+ // Removal of the processor from the CPU list is pending until all SMI handlers are finished\r
+ //\r
+ gSmmCpuPrivate->Operation[ProcessorNumber] = SmmCpuRemove;\r
+ return EFI_SUCCESS;\r
+}\r
+\r
+/**\r
+ This return the handle number for the calling processor.\r
+\r
+ @param[in] This A pointer to the EFI_SMM_CPU_SERVICE_PROTOCOL instance.\r
+ @param[out] ProcessorNumber The handle number of currently executing processor.\r
+\r
+ @retval EFI_SUCCESS The current processor handle number was returned\r
+ in ProcessorNumber.\r
+ @retval EFI_INVALID_PARAMETER ProcessorNumber is NULL.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+SmmWhoAmI (\r
+ IN CONST EFI_SMM_CPU_SERVICE_PROTOCOL *This,\r
+ OUT UINTN *ProcessorNumber\r
+ )\r
+{\r
+ UINTN Index;\r
+ UINT64 ApicId;\r
+\r
+ //\r
+ // Check parameter\r
+ //\r
+ if (ProcessorNumber == NULL) {\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
+\r
+ ApicId = GetApicId ();\r
+\r
+ for (Index = 0; Index < mMaxNumberOfCpus; Index++) {\r
+ if (gSmmCpuPrivate->ProcessorInfo[Index].ProcessorId == ApicId) {\r
+ *ProcessorNumber = Index;\r
+ return EFI_SUCCESS;\r
+ }\r
+ }\r
+ //\r
+ // This should not happen\r
+ //\r
+ ASSERT (FALSE);\r
+ return EFI_NOT_FOUND;\r
+}\r
+\r
+/**\r
+ Update the SMM CPU list per the pending operation.\r
+\r
+ This function is called after return from SMI handlers.\r
+**/\r
+VOID\r
+SmmCpuUpdate (\r
+ VOID\r
+ )\r
+{\r
+ UINTN Index;\r
+\r
+ //\r
+ // Handle pending BSP switch operations\r
+ //\r
+ for (Index = 0; Index < mMaxNumberOfCpus; Index++) {\r
+ if (gSmmCpuPrivate->Operation[Index] == SmmCpuSwitchBsp) {\r
+ gSmmCpuPrivate->Operation[Index] = SmmCpuNone;\r
+ mSmmMpSyncData->SwitchBsp = TRUE;\r
+ mSmmMpSyncData->CandidateBsp[Index] = TRUE;\r
+ }\r
+ }\r
+\r
+ //\r
+ // Handle pending hot-add operations\r
+ //\r
+ for (Index = 0; Index < mMaxNumberOfCpus; Index++) {\r
+ if (gSmmCpuPrivate->Operation[Index] == SmmCpuAdd) {\r
+ gSmmCpuPrivate->Operation[Index] = SmmCpuNone;\r
+ mNumberOfCpus++;\r
+ }\r
+ }\r
+\r
+ //\r
+ // Handle pending hot-remove operations\r
+ //\r
+ for (Index = 0; Index < mMaxNumberOfCpus; Index++) {\r
+ if (gSmmCpuPrivate->Operation[Index] == SmmCpuRemove) {\r
+ gSmmCpuPrivate->Operation[Index] = SmmCpuNone;\r
+ mNumberOfCpus--;\r
+ }\r
+ }\r
+}\r
+\r
+/**\r
+ Register exception handler.\r
+\r
+ @param This A pointer to the SMM_CPU_SERVICE_PROTOCOL instance.\r
+ @param ExceptionType Defines which interrupt or exception to hook. Type EFI_EXCEPTION_TYPE and\r
+ the valid values for this parameter are defined in EFI_DEBUG_SUPPORT_PROTOCOL\r
+ of the UEFI 2.0 specification.\r
+ @param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER\r
+ that is called when a processor interrupt occurs.\r
+ If this parameter is NULL, then the handler will be uninstalled.\r
+\r
+ @retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.\r
+ @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was previously installed.\r
+ @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not previously installed.\r
+ @retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+SmmRegisterExceptionHandler (\r
+ IN EFI_SMM_CPU_SERVICE_PROTOCOL *This,\r
+ IN EFI_EXCEPTION_TYPE ExceptionType,\r
+ IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler\r
+ )\r
+{\r
+ return RegisterCpuInterruptHandler (ExceptionType, InterruptHandler);\r
+}\r
+\r
+/**\r
+ Initialize SMM CPU Services.\r
+\r
+ It installs EFI SMM CPU Services Protocol.\r
+\r
+ @param ImageHandle The firmware allocated handle for the EFI image.\r
+\r
+ @retval EFI_SUCCESS EFI SMM CPU Services Protocol was installed successfully.\r
+**/\r
+EFI_STATUS\r
+InitializeSmmCpuServices (\r
+ IN EFI_HANDLE Handle\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+\r
+ Status = gSmst->SmmInstallProtocolInterface (\r
+ &Handle,\r
+ &gEfiSmmCpuServiceProtocolGuid,\r
+ EFI_NATIVE_INTERFACE,\r
+ &mSmmCpuService\r
+ );\r
+ ASSERT_EFI_ERROR (Status);\r
+ return Status;\r
+}\r
+\r
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