UefiCpuPkg/PiSmmCpuDxeSmm: Add SmmMemoryAttribute protocol

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / Ia32 / PageTbl.c

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
index c1f4b7e13d189e18c6e06f219aec377bef8f5124..9447a31ef5691b4fe0d1bcf792a9419151195ad2 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c
@@ -1,7 +1,9 @@
 /** @file\r
 Page table manipulation functions for IA-32 processors\r
 \r
 /** @file\r
 Page table manipulation functions for IA-32 processors\r
 \r

-Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
+\r

 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r


@@ -34,6 +36,8 @@ SmmInitPageTable (
   //\r
   InitializeSpinLock (mPFLock);\r
 \r
   //\r
   InitializeSpinLock (mPFLock);\r
 \r

+  mPhysicalAddressBits = 32;\r
+\r

   if (FeaturePcdGet (PcdCpuSmmProfileEnable)) {\r
     //\r
     // Set own Page Fault entry instead of the default one, because SMM Profile\r
   if (FeaturePcdGet (PcdCpuSmmProfileEnable)) {\r
     //\r
     // Set own Page Fault entry instead of the default one, because SMM Profile\r


@@ -86,8 +90,8 @@ SmiDefaultPFHandler (
 VOID\r
 EFIAPI\r
 SmiPFHandler (\r
 VOID\r
 EFIAPI\r
 SmiPFHandler (\r

-    IN EFI_EXCEPTION_TYPE   InterruptType,\r
-    IN EFI_SYSTEM_CONTEXT   SystemContext\r
+  IN EFI_EXCEPTION_TYPE   InterruptType,\r
+  IN EFI_SYSTEM_CONTEXT   SystemContext\r

   )\r
 {\r
   UINTN             PFAddress;\r
   )\r
 {\r
   UINTN             PFAddress;\r


@@ -106,6 +110,7 @@ SmiPFHandler (
   //\r
   if ((PFAddress >= mCpuHotPlugData.SmrrBase) &&\r
       (PFAddress < (mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize))) {\r
   //\r
   if ((PFAddress >= mCpuHotPlugData.SmrrBase) &&\r
       (PFAddress < (mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize))) {\r

+    DumpCpuContext (InterruptType, SystemContext);\r

     CpuIndex = GetCpuIndex ();\r
     GuardPageAddress = (mSmmStackArrayBase + EFI_PAGE_SIZE + CpuIndex * mSmmStackSize);\r
     if ((FeaturePcdGet (PcdCpuSmmStackGuard)) &&\r
     CpuIndex = GetCpuIndex ();\r
     GuardPageAddress = (mSmmStackArrayBase + EFI_PAGE_SIZE + CpuIndex * mSmmStackSize);\r
     if ((FeaturePcdGet (PcdCpuSmmStackGuard)) &&\r


@@ -113,15 +118,6 @@ SmiPFHandler (
         (PFAddress < (GuardPageAddress + EFI_PAGE_SIZE))) {\r
       DEBUG ((DEBUG_ERROR, "SMM stack overflow!\n"));\r
     } else {\r
         (PFAddress < (GuardPageAddress + EFI_PAGE_SIZE))) {\r
       DEBUG ((DEBUG_ERROR, "SMM stack overflow!\n"));\r
     } else {\r

-      DEBUG ((DEBUG_ERROR, "SMM exception data - 0x%x(", SystemContext.SystemContextIa32->ExceptionData));\r
-      DEBUG ((DEBUG_ERROR, "I:%x, R:%x, U:%x, W:%x, P:%x",\r
-        (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) != 0,\r
-        (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_RSVD) != 0,\r
-        (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_US) != 0,\r
-        (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_WR) != 0,\r
-        (SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_P) != 0\r
-        ));\r
-      DEBUG ((DEBUG_ERROR, ")\n"));\r

       if ((SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) != 0) {\r
         DEBUG ((DEBUG_ERROR, "SMM exception at execution (0x%x)\n", PFAddress));\r
         DEBUG_CODE (\r
       if ((SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) != 0) {\r
         DEBUG ((DEBUG_ERROR, "SMM exception at execution (0x%x)\n", PFAddress));\r
         DEBUG_CODE (\r


@@ -142,6 +138,7 @@ SmiPFHandler (
   //\r
   if ((PFAddress < mCpuHotPlugData.SmrrBase) ||\r
       (PFAddress >= mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)) {\r
   //\r
   if ((PFAddress < mCpuHotPlugData.SmrrBase) ||\r
       (PFAddress >= mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)) {\r

+    DumpCpuContext (InterruptType, SystemContext);\r

     if ((SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) != 0) {\r
       DEBUG ((DEBUG_ERROR, "Code executed on IP(0x%x) out of SMM range after SMM is locked!\n", PFAddress));\r
       DEBUG_CODE (\r
     if ((SystemContext.SystemContextIa32->ExceptionData & IA32_PF_EC_ID) != 0) {\r
       DEBUG ((DEBUG_ERROR, "Code executed on IP(0x%x) out of SMM range after SMM is locked!\n", PFAddress));\r
       DEBUG_CODE (\r


@@ -158,12 +155,25 @@ SmiPFHandler (
     }\r
   }\r
 \r
     }\r
   }\r
 \r

+  //\r
+  // If NULL pointer was just accessed\r
+  //\r
+  if ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT1) != 0 &&\r
+      (PFAddress < EFI_PAGE_SIZE)) {\r
+    DEBUG ((DEBUG_ERROR, "!!! NULL pointer access !!!\n"));\r
+    DEBUG_CODE (\r
+      DumpModuleInfoByIp ((UINTN)SystemContext.SystemContextIa32->Eip);\r
+    );\r
+    CpuDeadLoop ();\r
+  }\r
+\r

   if (FeaturePcdGet (PcdCpuSmmProfileEnable)) {\r
     SmmProfilePFHandler (\r
       SystemContext.SystemContextIa32->Eip,\r
       SystemContext.SystemContextIa32->ExceptionData\r
       );\r
   } else {\r
   if (FeaturePcdGet (PcdCpuSmmProfileEnable)) {\r
     SmmProfilePFHandler (\r
       SystemContext.SystemContextIa32->Eip,\r
       SystemContext.SystemContextIa32->ExceptionData\r
       );\r
   } else {\r

+    DumpCpuContext (InterruptType, SystemContext);\r

     SmiDefaultPFHandler ();\r
   }\r
 \r
     SmiDefaultPFHandler ();\r
   }\r
 \r


@@ -186,6 +196,16 @@ SetPageTableAttributes (
   BOOLEAN               IsSplitted;\r
   BOOLEAN               PageTableSplitted;\r
 \r
   BOOLEAN               IsSplitted;\r
   BOOLEAN               PageTableSplitted;\r
 \r

+  //
+  // Don't mark page table as read-only if heap guard is enabled.
+  //
+  //      BIT2: SMM page guard enabled
+  //      BIT3: SMM pool guard enabled
+  //
+  if ((PcdGet8 (PcdHeapGuardPropertyMask) & (BIT3 | BIT2)) != 0) {
+    return ;
+  }
+

   DEBUG ((DEBUG_INFO, "SetPageTableAttributes\n"));\r
 \r
   //\r
   DEBUG ((DEBUG_INFO, "SetPageTableAttributes\n"));\r
 \r
   //\r


@@ -204,7 +224,7 @@ SetPageTableAttributes (
     PageTableSplitted = (PageTableSplitted || IsSplitted);\r
 \r
     for (Index3 = 0; Index3 < 4; Index3++) {\r
     PageTableSplitted = (PageTableSplitted || IsSplitted);\r
 \r
     for (Index3 = 0; Index3 < 4; Index3++) {\r

-      L2PageTable = (UINT64 *)(UINTN)(L3PageTable[Index3] & PAGING_4K_ADDRESS_MASK_64);\r
+      L2PageTable = (UINT64 *)(UINTN)(L3PageTable[Index3] & ~mAddressEncMask & PAGING_4K_ADDRESS_MASK_64);\r

       if (L2PageTable == NULL) {\r
         continue;\r
       }\r
       if (L2PageTable == NULL) {\r
         continue;\r
       }\r


@@ -217,7 +237,7 @@ SetPageTableAttributes (
           // 2M\r
           continue;\r
         }\r
           // 2M\r
           continue;\r
         }\r

-        L1PageTable = (UINT64 *)(UINTN)(L2PageTable[Index2] & PAGING_4K_ADDRESS_MASK_64);\r
+        L1PageTable = (UINT64 *)(UINTN)(L2PageTable[Index2] & ~mAddressEncMask & PAGING_4K_ADDRESS_MASK_64);\r

         if (L1PageTable == NULL) {\r
           continue;\r
         }\r
         if (L1PageTable == NULL) {\r
           continue;\r
         }\r