UefiCpuPkg/PiSmmCpuDxeSmm: patch "XdSupported" with PatchInstructionX86()

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / Ia32 / SmiEntry.nasm

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm
index 0ea3c1e4498dbc1f434267c53abea02eb3dc828c..509e7a0a665fbc1ead1897955fcdbe44af7cbf5e 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm
@@ -44,10 +44,11 @@ extern ASM_PFX(CpuSmmDebugExit)
 \r
 global ASM_PFX(gcSmiHandlerTemplate)\r
 global ASM_PFX(gcSmiHandlerSize)\r
-global ASM_PFX(gSmiCr3)\r
+global ASM_PFX(gPatchSmiCr3)\r
 global ASM_PFX(gPatchSmiStack)\r
 global ASM_PFX(gPatchSmbase)\r
-global ASM_PFX(mXdSupported)\r
+extern ASM_PFX(mXdSupported)\r
+global ASM_PFX(gPatchXdSupported)\r
 extern ASM_PFX(gSmiHandlerIdtr)\r
 \r
     SECTION .text\r
@@ -93,8 +94,8 @@ ASM_PFX(gPatchSmiStack):
     jmp     ProtFlatMode\r
 \r
 ProtFlatMode:\r
-    DB      0xb8                        ; mov eax, imm32\r
-ASM_PFX(gSmiCr3): DD 0\r
+    mov eax, strict dword 0               ; source operand will be patched\r
+ASM_PFX(gPatchSmiCr3):\r
     mov     cr3, eax\r
 ;\r
 ; Need to test for CR4 specific bit support\r
@@ -133,8 +134,8 @@ ASM_PFX(gSmiCr3): DD 0
 .6:\r
 \r
 ; enable NXE if supported\r
-    DB      0b0h                        ; mov al, imm8\r
-ASM_PFX(mXdSupported):     DB      1\r
+    mov     al, strict byte 1           ; source operand may be patched\r
+ASM_PFX(gPatchXdSupported):\r
     cmp     al, 0\r
     jz      @SkipXd\r
 ;\r