;------------------------------------------------------------------------------ ;\r
-; Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>\r
; This program and the accompanying materials\r
; are licensed and made available under the terms and conditions of the BSD License\r
; which accompanies this distribution. The full text of the license may be found at\r
\r
global ASM_PFX(gcSmiIdtr)\r
global ASM_PFX(gcSmiGdtr)\r
+global ASM_PFX(gTaskGateDescriptor)\r
global ASM_PFX(gcPsd)\r
\r
SECTION .data\r
DD NullSeg\r
\r
ASM_PFX(gcSmiIdtr):\r
- DW IDT_SIZE - 1\r
- DD _SmiIDT\r
+ DW 0\r
+ DD 0\r
\r
-_SmiIDT:\r
-%rep 32\r
- DW 0 ; Offset 0:15\r
- DW CODE_SEL ; Segment selector\r
- DB 0 ; Unused\r
- DB 0x8e ; Interrupt Gate, Present\r
- DW 0 ; Offset 16:31\r
-%endrep\r
-\r
-IDT_SIZE equ $ - _SmiIDT\r
-\r
-TaskGateDescriptor:\r
+ASM_PFX(gTaskGateDescriptor):\r
DW 0 ; Reserved\r
DW EXCEPTION_TSS_SEL ; TSS Segment selector\r
DB 0 ; Reserved\r
clts\r
iretd\r
\r
-global ASM_PFX(InitializeIDTSmmStackGuard)\r
-ASM_PFX(InitializeIDTSmmStackGuard):\r
- push ebx\r
-;\r
-; If SMM Stack Guard feature is enabled, the Page Fault Exception entry in IDT\r
-; is a Task Gate Descriptor so that when a Page Fault Exception occurrs,\r
-; the processors can use a known good stack in case stack is ran out.\r
-;\r
- lea ebx, [_SmiIDT + 14 * 8]\r
- lea edx, [TaskGateDescriptor]\r
- mov eax, [edx]\r
- mov [ebx], eax\r
- mov eax, [edx + 4]\r
- mov [ebx + 4], eax\r
- pop ebx\r
- ret\r