UefiCpuPkg: Replace BSD License with BSD+Patent License

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / Ia32 / SmiException.nasm

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.nasm
index 4d58999e90a64f74376e067431d33c3e9897a779..e7b85a9949826712acef087b546c0c0e8666913f 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.nasm
@@ -1,12 +1,6 @@
 ;------------------------------------------------------------------------------ ;\r
-; Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>\r
-; This program and the accompanying materials\r
-; are licensed and made available under the terms and conditions of the BSD License\r
-; which accompanies this distribution.  The full text of the license may be found at\r
-; http://opensource.org/licenses/bsd-license.php.\r
-;\r
-; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+; Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.<BR>\r
+; SPDX-License-Identifier: BSD-2-Clause-Patent\r
 ;\r
 ; Module Name:\r
 ;\r
@@ -19,8 +13,8 @@
 ;-------------------------------------------------------------------------------\r
 \r
 extern  ASM_PFX(FeaturePcdGet (PcdCpuSmmProfileEnable))\r
-extern  ASM_PFX(gSmiMtrrs)\r
 extern  ASM_PFX(SmiPFHandler)\r
+extern  ASM_PFX(mSetupDebugTrap)\r
 \r
 global  ASM_PFX(gcSmiIdtr)\r
 global  ASM_PFX(gcSmiGdtr)\r
@@ -89,7 +83,7 @@ TssSeg:
             DB      0x80                ; LimitHigh\r
             DB      0                   ; BaseHigh\r
 ExceptionTssSeg:\r
-            DW      TSS_DESC_SIZE       ; LimitLow\r
+            DW      EXCEPTION_TSS_DESC_SIZE       ; LimitLow\r
             DW      0                   ; BaseLow\r
             DB      0                   ; BaseMid\r
             DB      0x89\r
@@ -223,6 +217,8 @@ ExceptionTssDescriptor:
             DW      0                   ; Reserved\r
             DW      0                   ; T\r
             DW      0                   ; I/O Map Base\r
+            DD      0                   ; SSP\r
+EXCEPTION_TSS_DESC_SIZE equ $ - ExceptionTssDescriptor\r
 \r
 ASM_PFX(gcPsd):\r
             DB      'PSDSIG  '\r
@@ -243,7 +239,7 @@ ASM_PFX(gcPsd):
             DD      0\r
             times   24 DB 0\r
             DD      0\r
-            DD      ASM_PFX(gSmiMtrrs)\r
+            DD      0\r
 PSD_SIZE  equ $ - ASM_PFX(gcPsd)\r
 \r
 ASM_PFX(gcSmiGdtr):\r
@@ -383,7 +379,7 @@ ASM_PFX(PageFaultIdtHandlerSmmProfile):
 ;; FX_SAVE_STATE_IA32 FxSaveState;\r
     sub     esp, 512\r
     mov     edi, esp\r
-    db      0xf, 0xae, 0x7 ;fxsave [edi]\r
+    fxsave  [edi]\r
 \r
 ; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear\r
     cld\r
@@ -411,7 +407,7 @@ ASM_PFX(PageFaultIdtHandlerSmmProfile):
 \r
 ;; FX_SAVE_STATE_IA32 FxSaveState;\r
     mov     esi, esp\r
-    db      0xf, 0xae, 0xe ; fxrstor [esi]\r
+    fxrstor [esi]\r
     add     esp, 512\r
 \r
 ;; UINT32  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
@@ -583,7 +579,7 @@ PFHandlerEntry:
     clts\r
     sub     esp, 512\r
     mov     edi, esp\r
-    db      0xf, 0xae, 0x7 ;fxsave [edi]\r
+    fxsave  [edi]\r
 \r
 ; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear\r
     cld\r
@@ -613,7 +609,7 @@ PFHandlerEntry:
 \r
 ;; FX_SAVE_STATE_IA32 FxSaveState;\r
     mov     esi, esp\r
-    db      0xf, 0xae, 0xe ; fxrstor [esi]\r
+    fxrstor [esi]\r
     add     esp, 512\r
 \r
 ;; UINT32  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
@@ -674,7 +670,7 @@ o16 mov     [ecx + IA32_TSS._SS], ax
     mov     esp, ebp\r
 \r
 ; Set single step DB# if SMM profile is enabled and page fault exception happens\r
-    cmp     byte [dword ASM_PFX(FeaturePcdGet (PcdCpuSmmProfileEnable))], 0\r
+    cmp     byte [dword ASM_PFX(mSetupDebugTrap)], 0\r
     jz      @Done2\r
 \r
 ; Create return context for iretd in stub function\r