/** @file\r
SMM CPU misc functions for Ia32 arch specific.\r
\r
-Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
\r
GdtTssTableSize = (gcSmiGdtr.Limit + 1 + TSS_SIZE * 2 + 7) & ~7; // 8 bytes aligned\r
mGdtBufferSize = GdtTssTableSize * gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus;\r
- GdtTssTables = (UINT8*)AllocateCodePages (EFI_SIZE_TO_PAGES (mGdtBufferSize));\r
+ //\r
+ // IA32 Stack Guard need use task switch to switch stack that need\r
+ // write GDT and TSS, so AllocateCodePages() could not be used here\r
+ // as code pages will be set to RO. \r
+ //\r
+ GdtTssTables = (UINT8*)AllocatePages (EFI_SIZE_TO_PAGES (mGdtBufferSize));\r
ASSERT (GdtTssTables != NULL);\r
mGdtBuffer = (UINTN)GdtTssTables;\r
GdtTableStepSize = GdtTssTableSize;\r
return GdtTssTables;\r
}\r
\r
-/**\r
- This function sets GDT/IDT buffer to be RO and XP.\r
-**/\r
-VOID\r
-PatchGdtIdtMap (\r
- VOID\r
- )\r
-{\r
- EFI_PHYSICAL_ADDRESS BaseAddress;\r
- UINTN Size;\r
-\r
- //\r
- // GDT\r
- //\r
- DEBUG ((DEBUG_INFO, "PatchGdtIdtMap - GDT:\n"));\r
-\r
- BaseAddress = mGdtBuffer;\r
- Size = ALIGN_VALUE(mGdtBufferSize, SIZE_4KB);\r
- if (!FeaturePcdGet (PcdCpuSmmStackGuard)) {\r
- //\r
- // Do not set RO for IA32 when stack guard feature is enabled.\r
- // Stack Guard need use task switch to switch stack.\r
- // It need write GDT and TSS.\r
- //\r
- SmmSetMemoryAttributes (\r
- BaseAddress,\r
- Size,\r
- EFI_MEMORY_RO\r
- );\r
- }\r
- SmmSetMemoryAttributes (\r
- BaseAddress,\r
- Size,\r
- EFI_MEMORY_XP\r
- );\r
-\r
- //\r
- // IDT\r
- //\r
- DEBUG ((DEBUG_INFO, "PatchGdtIdtMap - IDT:\n"));\r
-\r
- BaseAddress = gcSmiIdtr.Base;\r
- Size = ALIGN_VALUE(gcSmiIdtr.Limit + 1, SIZE_4KB);\r
- SmmSetMemoryAttributes (\r
- BaseAddress,\r
- Size,\r
- EFI_MEMORY_RO\r
- );\r
- SmmSetMemoryAttributes (\r
- BaseAddress,\r
- Size,\r
- EFI_MEMORY_XP\r
- );\r
-}\r
-\r
/**\r
Transfer AP to safe hlt-loop after it finished restore CPU features on S3 patch.\r
\r