UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmmCr0" with PatchInstructionX86()

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / Ia32 / SmmInit.nasm

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
index 9231aa5b3deda5fefdbcd4f3c772a0e60bd98633..0f62fe4487125c38532b6b7690cbee817d818b91 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm
@@ -22,9 +22,9 @@ extern ASM_PFX(SmmInitHandler)
 extern ASM_PFX(mRebasedFlag)\r
 extern ASM_PFX(mSmmRelocationOriginalAddress)\r
 \r
-global ASM_PFX(gSmmCr3)\r
-global ASM_PFX(gSmmCr4)\r
-global ASM_PFX(gSmmCr0)\r
+global ASM_PFX(gPatchSmmCr3)\r
+global ASM_PFX(gPatchSmmCr4)\r
+global ASM_PFX(gPatchSmmCr0)\r
 global ASM_PFX(gSmmJmpAddr)\r
 global ASM_PFX(gSmmInitStack)\r
 global ASM_PFX(gcSmiInitGdtr)\r
@@ -47,22 +47,21 @@ ASM_PFX(SmmStartup):
     mov     eax, 0x80000001             ; read capability\r
     cpuid\r
     mov     ebx, edx                    ; rdmsr will change edx. keep it in ebx.\r
-    DB      0x66, 0xb8                  ; mov eax, imm32\r
-ASM_PFX(gSmmCr3): DD 0\r
+    and     ebx, BIT20                  ; extract NX capability bit\r
+    shr     ebx, 9                      ; shift bit to IA32_EFER.NXE[BIT11] position\r
+    mov     eax, strict dword 0         ; source operand will be patched\r
+ASM_PFX(gPatchSmmCr3):\r
     mov     cr3, eax\r
 o32 lgdt    [cs:ebp + (ASM_PFX(gcSmiInitGdtr) - ASM_PFX(SmmStartup))]\r
-    DB      0x66, 0xb8                  ; mov eax, imm32\r
-ASM_PFX(gSmmCr4): DD 0\r
+    mov     eax, strict dword 0         ; source operand will be patched\r
+ASM_PFX(gPatchSmmCr4):\r
     mov     cr4, eax\r
     mov     ecx, 0xc0000080             ; IA32_EFER MSR\r
     rdmsr\r
-    test    ebx, BIT20                  ; check NXE capability\r
-    jz      .1\r
-    or      ah, BIT3                    ; set NXE bit\r
+    or      eax, ebx                    ; set NXE bit if NX is available\r
     wrmsr\r
-.1:\r
-    DB      0x66, 0xb8                  ; mov eax, imm32\r
-ASM_PFX(gSmmCr0): DD 0\r
+    mov     eax, strict dword 0         ; source operand will be patched\r
+ASM_PFX(gPatchSmmCr0):\r
     mov     di, PROTECT_MODE_DS\r
     mov     cr0, eax\r
     DB      0x66, 0xea                  ; jmp far [ptr48]\r