extern ASM_PFX(mRebasedFlag)\r
extern ASM_PFX(mSmmRelocationOriginalAddress)\r
\r
-global ASM_PFX(gSmmCr3)\r
-global ASM_PFX(gSmmCr4)\r
-global ASM_PFX(gSmmCr0)\r
-global ASM_PFX(gSmmJmpAddr)\r
-global ASM_PFX(gSmmInitStack)\r
+global ASM_PFX(gPatchSmmCr3)\r
+global ASM_PFX(gPatchSmmCr4)\r
+global ASM_PFX(gPatchSmmCr0)\r
+global ASM_PFX(gPatchSmmInitStack)\r
global ASM_PFX(gcSmiInitGdtr)\r
global ASM_PFX(gcSmmInitSize)\r
global ASM_PFX(gcSmmInitTemplate)\r
mov eax, 0x80000001 ; read capability\r
cpuid\r
mov ebx, edx ; rdmsr will change edx. keep it in ebx.\r
- DB 0x66, 0xb8 ; mov eax, imm32\r
-ASM_PFX(gSmmCr3): DD 0\r
+ and ebx, BIT20 ; extract NX capability bit\r
+ shr ebx, 9 ; shift bit to IA32_EFER.NXE[BIT11] position\r
+ mov eax, strict dword 0 ; source operand will be patched\r
+ASM_PFX(gPatchSmmCr3):\r
mov cr3, eax\r
o32 lgdt [cs:ebp + (ASM_PFX(gcSmiInitGdtr) - ASM_PFX(SmmStartup))]\r
- DB 0x66, 0xb8 ; mov eax, imm32\r
-ASM_PFX(gSmmCr4): DD 0\r
+ mov eax, strict dword 0 ; source operand will be patched\r
+ASM_PFX(gPatchSmmCr4):\r
mov cr4, eax\r
mov ecx, 0xc0000080 ; IA32_EFER MSR\r
rdmsr\r
- test ebx, BIT20 ; check NXE capability\r
- jz .1\r
- or ah, BIT3 ; set NXE bit\r
+ or eax, ebx ; set NXE bit if NX is available\r
wrmsr\r
-.1:\r
- DB 0x66, 0xb8 ; mov eax, imm32\r
-ASM_PFX(gSmmCr0): DD 0\r
+ mov eax, strict dword 0 ; source operand will be patched\r
+ASM_PFX(gPatchSmmCr0):\r
mov di, PROTECT_MODE_DS\r
mov cr0, eax\r
- DB 0x66, 0xea ; jmp far [ptr48]\r
-ASM_PFX(gSmmJmpAddr):\r
- DD @32bit\r
- DW PROTECT_MODE_CS\r
+ jmp PROTECT_MODE_CS : dword @32bit\r
\r
BITS 32\r
@32bit:\r
mov fs, edi\r
mov gs, edi\r
mov ss, edi\r
- DB 0xbc ; mov esp, imm32\r
-ASM_PFX(gSmmInitStack): DD 0\r
+ mov esp, strict dword 0 ; source operand will be patched\r
+ASM_PFX(gPatchSmmInitStack):\r
call ASM_PFX(SmmInitHandler)\r
rsm\r
\r