IA-32 processor specific header file to enable SMM profile.\r
\r
Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution. The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#pragma pack (1)\r
\r
typedef struct _MSR_DS_AREA_STRUCT {\r
- UINT32 BTSBufferBase;\r
- UINT32 BTSIndex;\r
- UINT32 BTSAbsoluteMaximum;\r
- UINT32 BTSInterruptThreshold;\r
- UINT32 PEBSBufferBase;\r
- UINT32 PEBSIndex;\r
- UINT32 PEBSAbsoluteMaximum;\r
- UINT32 PEBSInterruptThreshold;\r
- UINT32 PEBSCounterReset[4];\r
- UINT32 Reserved;\r
+ UINT32 BTSBufferBase;\r
+ UINT32 BTSIndex;\r
+ UINT32 BTSAbsoluteMaximum;\r
+ UINT32 BTSInterruptThreshold;\r
+ UINT32 PEBSBufferBase;\r
+ UINT32 PEBSIndex;\r
+ UINT32 PEBSAbsoluteMaximum;\r
+ UINT32 PEBSInterruptThreshold;\r
+ UINT32 PEBSCounterReset[4];\r
+ UINT32 Reserved;\r
} MSR_DS_AREA_STRUCT;\r
\r
typedef struct _BRANCH_TRACE_RECORD {\r
- UINT32 LastBranchFrom;\r
- UINT32 LastBranchTo;\r
- UINT32 Rsvd0 : 4;\r
- UINT32 BranchPredicted : 1;\r
- UINT32 Rsvd1 : 27;\r
+ UINT32 LastBranchFrom;\r
+ UINT32 LastBranchTo;\r
+ UINT32 Rsvd0 : 4;\r
+ UINT32 BranchPredicted : 1;\r
+ UINT32 Rsvd1 : 27;\r
} BRANCH_TRACE_RECORD;\r
\r
typedef struct _PEBS_RECORD {\r
- UINT32 Eflags;\r
- UINT32 LinearIP;\r
- UINT32 Eax;\r
- UINT32 Ebx;\r
- UINT32 Ecx;\r
- UINT32 Edx;\r
- UINT32 Esi;\r
- UINT32 Edi;\r
- UINT32 Ebp;\r
- UINT32 Esp;\r
+ UINT32 Eflags;\r
+ UINT32 LinearIP;\r
+ UINT32 Eax;\r
+ UINT32 Ebx;\r
+ UINT32 Ecx;\r
+ UINT32 Edx;\r
+ UINT32 Esi;\r
+ UINT32 Edi;\r
+ UINT32 Ebp;\r
+ UINT32 Esp;\r
} PEBS_RECORD;\r
\r
#pragma pack ()\r
\r
-#define PHYSICAL_ADDRESS_MASK ((1ull << 32) - SIZE_4KB)\r
+#define PHYSICAL_ADDRESS_MASK ((1ull << 32) - SIZE_4KB)\r
\r
/**\r
Update page table to map the memory correctly in order to make the instruction\r
**/\r
VOID\r
RestorePageTableAbove4G (\r
- UINT64 *PageTable,\r
- UINT64 PFAddress,\r
- UINTN CpuIndex,\r
- UINTN ErrorCode,\r
- BOOLEAN *IsValidPFAddress\r
+ UINT64 *PageTable,\r
+ UINT64 PFAddress,\r
+ UINTN CpuIndex,\r
+ UINTN ErrorCode,\r
+ BOOLEAN *IsValidPFAddress\r
);\r
\r
/**\r