\r
mSplitMemRangeCount = NumberOfSpliteRange;\r
\r
- DEBUG ((EFI_D_INFO, "SMM Profile Memory Ranges:\n"));\r
+ DEBUG ((DEBUG_INFO, "SMM Profile Memory Ranges:\n"));\r
for (Index = 0; Index < mProtectionMemRangeCount; Index++) {\r
- DEBUG ((EFI_D_INFO, "mProtectionMemRange[%d].Base = %lx\n", Index, mProtectionMemRange[Index].Range.Base));\r
- DEBUG ((EFI_D_INFO, "mProtectionMemRange[%d].Top = %lx\n", Index, mProtectionMemRange[Index].Range.Top));\r
+ DEBUG ((DEBUG_INFO, "mProtectionMemRange[%d].Base = %lx\n", Index, mProtectionMemRange[Index].Range.Base));\r
+ DEBUG ((DEBUG_INFO, "mProtectionMemRange[%d].Top = %lx\n", Index, mProtectionMemRange[Index].Range.Top));\r
}\r
for (Index = 0; Index < mSplitMemRangeCount; Index++) {\r
- DEBUG ((EFI_D_INFO, "mSplitMemRange[%d].Base = %lx\n", Index, mSplitMemRange[Index].Base));\r
- DEBUG ((EFI_D_INFO, "mSplitMemRange[%d].Top = %lx\n", Index, mSplitMemRange[Index].Top));\r
+ DEBUG ((DEBUG_INFO, "mSplitMemRange[%d].Base = %lx\n", Index, mSplitMemRange[Index].Base));\r
+ DEBUG ((DEBUG_INFO, "mSplitMemRange[%d].Top = %lx\n", Index, mSplitMemRange[Index].Top));\r
}\r
}\r
\r
//\r
// Go through page table and set several page table entries to absent or execute-disable.\r
//\r
- DEBUG ((EFI_D_INFO, "Patch page table start ...\n"));\r
+ DEBUG ((DEBUG_INFO, "Patch page table start ...\n"));\r
for (Pml5Index = 0; Pml5Index < NumberOfPml5Entries; Pml5Index++) {\r
if ((Pml5[Pml5Index] & IA32_PG_P) == 0) {\r
//\r
// Flush TLB\r
//\r
CpuFlushTlb ();\r
- DEBUG ((EFI_D_INFO, "Patch page table done!\n"));\r
+ DEBUG ((DEBUG_INFO, "Patch page table done!\n"));\r
//\r
// Set execute-disable flag\r
//\r
ASSERT (Fadt != NULL);\r
\r
mSmiCommandPort = Fadt->SmiCmd;\r
- DEBUG ((EFI_D_INFO, "mSmiCommandPort = %x\n", mSmiCommandPort));\r
+ DEBUG ((DEBUG_INFO, "mSmiCommandPort = %x\n", mSmiCommandPort));\r
}\r
\r
/**\r
MSR_IA32_MISC_ENABLE_REGISTER MiscEnableMsr;\r
\r
if ((PcdGet32 (PcdControlFlowEnforcementPropertyMask) != 0) && mCetSupported) {\r
- AsmCpuid (CPUID_EXTENDED_FUNCTION, &RegEax, NULL, NULL, NULL);\r
- if (RegEax <= CPUID_EXTENDED_FUNCTION) {\r
- mCetSupported = FALSE;\r
- PatchInstructionX86 (mPatchCetSupported, mCetSupported, 1);\r
- }\r
- AsmCpuidEx (CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS, CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_SUB_LEAF_INFO, NULL, NULL, &RegEcx, NULL);\r
- if ((RegEcx & CPUID_CET_SS) == 0) {\r
+ AsmCpuid (CPUID_SIGNATURE, &RegEax, NULL, NULL, NULL);\r
+ if (RegEax >= CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS) {\r
+ AsmCpuidEx (CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS, CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_SUB_LEAF_INFO, NULL, NULL, &RegEcx, NULL);\r
+ if ((RegEcx & CPUID_CET_SS) == 0) {\r
+ mCetSupported = FALSE;\r
+ PatchInstructionX86 (mPatchCetSupported, mCetSupported, 1);\r
+ }\r
+ } else {\r
mCetSupported = FALSE;\r
PatchInstructionX86 (mPatchCetSupported, mCetSupported, 1);\r
}\r