/** @file\r
Page Fault (#PF) handler for X64 processors\r
\r
-Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>\r
Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
\r
This program and the accompanying materials\r
\r
LIST_ENTRY mPagePool = INITIALIZE_LIST_HEAD_VARIABLE (mPagePool);\r
BOOLEAN m1GPageTableSupport = FALSE;\r
-UINT8 mPhysicalAddressBits;\r
BOOLEAN mCpuSmmStaticPageTable;\r
\r
/**\r
VOID\r
EFIAPI\r
SmiPFHandler (\r
- IN EFI_EXCEPTION_TYPE InterruptType,\r
- IN EFI_SYSTEM_CONTEXT SystemContext\r
+ IN EFI_EXCEPTION_TYPE InterruptType,\r
+ IN EFI_SYSTEM_CONTEXT SystemContext\r
)\r
{\r
UINTN PFAddress;\r
PFAddress = AsmReadCr2 ();\r
\r
if (mCpuSmmStaticPageTable && (PFAddress >= LShiftU64 (1, (mPhysicalAddressBits - 1)))) {\r
+ DumpCpuContext (InterruptType, SystemContext);\r
DEBUG ((DEBUG_ERROR, "Do not support address 0x%lx by processor!\n", PFAddress));\r
CpuDeadLoop ();\r
}\r
//\r
if ((PFAddress >= mCpuHotPlugData.SmrrBase) &&\r
(PFAddress < (mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize))) {\r
+ DumpCpuContext (InterruptType, SystemContext);\r
CpuIndex = GetCpuIndex ();\r
GuardPageAddress = (mSmmStackArrayBase + EFI_PAGE_SIZE + CpuIndex * mSmmStackSize);\r
if ((FeaturePcdGet (PcdCpuSmmStackGuard)) &&\r
(PFAddress < (GuardPageAddress + EFI_PAGE_SIZE))) {\r
DEBUG ((DEBUG_ERROR, "SMM stack overflow!\n"));\r
} else {\r
- DEBUG ((DEBUG_ERROR, "SMM exception data - 0x%lx(", SystemContext.SystemContextX64->ExceptionData));\r
- DEBUG ((DEBUG_ERROR, "I:%x, R:%x, U:%x, W:%x, P:%x",\r
- (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != 0,\r
- (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_RSVD) != 0,\r
- (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_US) != 0,\r
- (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_WR) != 0,\r
- (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_P) != 0\r
- ));\r
- DEBUG ((DEBUG_ERROR, ")\n"));\r
if ((SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != 0) {\r
DEBUG ((DEBUG_ERROR, "SMM exception at execution (0x%lx)\n", PFAddress));\r
DEBUG_CODE (\r
//\r
if ((PFAddress < mCpuHotPlugData.SmrrBase) ||\r
(PFAddress >= mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)) {\r
+ DumpCpuContext (InterruptType, SystemContext);\r
if ((SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != 0) {\r
DEBUG ((DEBUG_ERROR, "Code executed on IP(0x%lx) out of SMM range after SMM is locked!\n", PFAddress));\r
DEBUG_CODE (\r
}\r
}\r
\r
+ //\r
+ // If NULL pointer was just accessed\r
+ //\r
+ if ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT1) != 0 &&\r
+ (PFAddress < EFI_PAGE_SIZE)) {\r
+ DEBUG ((DEBUG_ERROR, "!!! NULL pointer access !!!\n"));\r
+ DEBUG_CODE (\r
+ DumpModuleInfoByIp ((UINTN)SystemContext.SystemContextX64->Rip);\r
+ );\r
+ CpuDeadLoop ();\r
+ }\r
+\r
if (FeaturePcdGet (PcdCpuSmmProfileEnable)) {\r
SmmProfilePFHandler (\r
SystemContext.SystemContextX64->Rip,\r
BOOLEAN IsSplitted;\r
BOOLEAN PageTableSplitted;\r
\r
- if (!mCpuSmmStaticPageTable) {\r
+ //
+ // Don't do this if
+ // - no static page table; or
+ // - SMM heap guard feature enabled
+ // BIT2: SMM page guard enabled
+ // BIT3: SMM pool guard enabled
+ //
+ if (!mCpuSmmStaticPageTable ||
+ (PcdGet8 (PcdHeapGuardPropertyMask) & (BIT3 | BIT2)) != 0) {
+ //
+ // Static paging and heap guard should not be enabled at the same time.
+ //
+ ASSERT (!(mCpuSmmStaticPageTable &&
+ (PcdGet8 (PcdHeapGuardPropertyMask) & (BIT3 | BIT2)) != 0));
return ;\r
}\r
\r