UefiCpuPkg/PiSmmCpuDxeSmm: Consume new APIs

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / X64 / PageTbl.c

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
index 19b19d822510cc43e93c2f31459ed2bffc4f6b28..32385faae4700b64d2c302de2d6e6a62a168fef8 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/PageTbl.c
@@ -1,7 +1,7 @@
 /** @file\r
 Page Fault (#PF) handler for X64 processors\r
 \r
-Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>\r
 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
 \r
 This program and the accompanying materials\r
@@ -802,8 +802,8 @@ SmiDefaultPFHandler (
 VOID\r
 EFIAPI\r
 SmiPFHandler (\r
-    IN EFI_EXCEPTION_TYPE   InterruptType,\r
-    IN EFI_SYSTEM_CONTEXT   SystemContext\r
+  IN EFI_EXCEPTION_TYPE   InterruptType,\r
+  IN EFI_SYSTEM_CONTEXT   SystemContext\r
   )\r
 {\r
   UINTN             PFAddress;\r
@@ -817,6 +817,7 @@ SmiPFHandler (
   PFAddress = AsmReadCr2 ();\r
 \r
   if (mCpuSmmStaticPageTable && (PFAddress >= LShiftU64 (1, (mPhysicalAddressBits - 1)))) {\r
+    DumpCpuContext (InterruptType, SystemContext);\r
     DEBUG ((DEBUG_ERROR, "Do not support address 0x%lx by processor!\n", PFAddress));\r
     CpuDeadLoop ();\r
   }\r
@@ -827,6 +828,7 @@ SmiPFHandler (
   //\r
   if ((PFAddress >= mCpuHotPlugData.SmrrBase) &&\r
       (PFAddress < (mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize))) {\r
+    DumpCpuContext (InterruptType, SystemContext);\r
     CpuIndex = GetCpuIndex ();\r
     GuardPageAddress = (mSmmStackArrayBase + EFI_PAGE_SIZE + CpuIndex * mSmmStackSize);\r
     if ((FeaturePcdGet (PcdCpuSmmStackGuard)) &&\r
@@ -834,15 +836,6 @@ SmiPFHandler (
         (PFAddress < (GuardPageAddress + EFI_PAGE_SIZE))) {\r
       DEBUG ((DEBUG_ERROR, "SMM stack overflow!\n"));\r
     } else {\r
-      DEBUG ((DEBUG_ERROR, "SMM exception data - 0x%lx(", SystemContext.SystemContextX64->ExceptionData));\r
-      DEBUG ((DEBUG_ERROR, "I:%x, R:%x, U:%x, W:%x, P:%x",\r
-        (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != 0,\r
-        (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_RSVD) != 0,\r
-        (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_US) != 0,\r
-        (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_WR) != 0,\r
-        (SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_P) != 0\r
-        ));\r
-      DEBUG ((DEBUG_ERROR, ")\n"));\r
       if ((SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != 0) {\r
         DEBUG ((DEBUG_ERROR, "SMM exception at execution (0x%lx)\n", PFAddress));\r
         DEBUG_CODE (\r
@@ -863,6 +856,7 @@ SmiPFHandler (
   //\r
   if ((PFAddress < mCpuHotPlugData.SmrrBase) ||\r
       (PFAddress >= mCpuHotPlugData.SmrrBase + mCpuHotPlugData.SmrrSize)) {\r
+    DumpCpuContext (InterruptType, SystemContext);\r
     if ((SystemContext.SystemContextX64->ExceptionData & IA32_PF_EC_ID) != 0) {\r
       DEBUG ((DEBUG_ERROR, "Code executed on IP(0x%lx) out of SMM range after SMM is locked!\n", PFAddress));\r
       DEBUG_CODE (\r