MdePkg/BaseLib: add PatchInstructionX86()

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / X64 / SmiException.asm

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm
index 3d841c654676d479f9113e46688a8dad79d58ea1..80bd739ff4c89ccc8598a11bb7fc2b41675aa425 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm
@@ -1,5 +1,5 @@
 ;------------------------------------------------------------------------------ ;\r
-; Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>\r
 ; This program and the accompanying materials\r
 ; are licensed and made available under the terms and conditions of the BSD License\r
 ; which accompanies this distribution.  The full text of the license may be found at\r
@@ -19,7 +19,6 @@
 ;-------------------------------------------------------------------------------\r
 \r
 EXTERNDEF   SmiPFHandler:PROC\r
-EXTERNDEF   gSmiMtrrs:QWORD\r
 EXTERNDEF   gcSmiIdtr:FWORD\r
 EXTERNDEF   gcSmiGdtr:FWORD\r
 EXTERNDEF   gcPsd:BYTE\r
@@ -78,11 +77,11 @@ CodeSeg64   LABEL   QWORD
             DB      0                   ; BaseHigh\r
 ; TSS Segment for X64 specially\r
 TssSeg      LABEL   QWORD\r
-            DW      TSS_DESC_SIZE       ; LimitLow\r
+            DW      TSS_DESC_SIZE - 1   ; LimitLow\r
             DW      0                   ; BaseLow\r
             DB      0                   ; BaseMid\r
             DB      89h\r
-            DB      080h                ; LimitHigh\r
+            DB      00h                 ; LimitHigh\r
             DB      0                   ; BaseHigh\r
             DD      0                   ; BaseUpper\r
             DD      0                   ; Reserved\r
@@ -129,7 +128,7 @@ gcPsd     LABEL   BYTE
             DD      GDT_SIZE\r
             DD      0\r
             DB      24 dup (0)\r
-            DQ      offset gSmiMtrrs\r
+            DQ      0\r
 PSD_SIZE  = $ - offset gcPsd\r
 \r
 ;\r
@@ -144,27 +143,8 @@ gcSmiGdtr   LABEL   FWORD
     DQ      offset NullSeg\r
 \r
 gcSmiIdtr   LABEL   FWORD\r
-    DW      IDT_SIZE - 1\r
-    DQ      offset _SmiIDT\r
-\r
-    .data\r
-\r
-;\r
-; Here is the IDT. There are 32 (not 255) entries in it since only processor\r
-; generated exceptions will be handled.\r
-;\r
-_SmiIDT:\r
-REPEAT      32\r
-    DW      0                           ; Offset 0:15\r
-    DW      CODE_SEL                    ; Segment selector\r
-    DB      0                           ; Unused\r
-    DB      8eh                         ; Interrupt Gate, Present\r
-    DW      0                           ; Offset 16:31\r
-    DQ      0                           ; Offset 32:63\r
-            ENDM\r
-_SmiIDTEnd:\r
-\r
-IDT_SIZE = (offset _SmiIDTEnd - offset _SmiIDT)\r
+    DW      0\r
+    DQ      0\r
 \r
     .code\r
 \r
@@ -400,14 +380,4 @@ PageFaultIdtHandlerSmmProfile    PROC
     iretq\r
 PageFaultIdtHandlerSmmProfile ENDP\r
 \r
-InitializeIDTSmmStackGuard   PROC\r
-;\r
-; If SMM Stack Guard feature is enabled, set the IST field of\r
-; the interrupt gate for Page Fault Exception to be 1\r
-;\r
-    lea     rax, _SmiIDT + 14 * 16\r
-    mov     byte ptr [rax + 4], 1\r
-    ret\r
-InitializeIDTSmmStackGuard   ENDP\r
-\r
     END\r