UefiCpuPkg/PiSmmCpu: Add Shadow Stack Support for X86 SMM.

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / X64 / SmmFuncsArch.c

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c
index 89b3f2b7257f3a057d9e9f8257da25ce15db7440..c28c15b0ba9fd8d1baae689341e9d2d6d5525f6b 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmFuncsArch.c
@@ -1,7 +1,7 @@
 /** @file\r
   SMM CPU misc functions for x64 arch specific.\r
 \r
-Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2015 - 2019, Intel Corporation. All rights reserved.<BR>\r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r
@@ -17,6 +17,18 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 EFI_PHYSICAL_ADDRESS                mGdtBuffer;\r
 UINTN                               mGdtBufferSize;\r
 \r
+extern BOOLEAN mCetSupported;\r
+extern UINTN mSmmShadowStackSize;\r
+\r
+X86_ASSEMBLY_PATCH_LABEL mPatchCetPl0Ssp;\r
+X86_ASSEMBLY_PATCH_LABEL mPatchCetInterruptSsp;\r
+X86_ASSEMBLY_PATCH_LABEL mPatchCetInterruptSspTable;\r
+UINT32 mCetPl0Ssp;\r
+UINT32 mCetInterruptSsp;\r
+UINT32 mCetInterruptSspTable;\r
+\r
+UINTN  mSmmInterruptSspTables;\r
+\r
 /**\r
   Initialize IDT for SMM Stack Guard.\r
 \r
@@ -153,3 +165,47 @@ TransferApToSafeState (
   ASSERT (FALSE);\r
 }\r
 \r
+/**\r
+  Initialize the shadow stack related data structure.\r
+\r
+  @param CpuIndex     The index of CPU.\r
+  @param ShadowStack  The bottom of the shadow stack for this CPU.\r
+**/\r
+VOID\r
+InitShadowStack (\r
+  IN UINTN  CpuIndex,\r
+  IN VOID   *ShadowStack\r
+  )\r
+{\r
+  UINTN       SmmShadowStackSize;\r
+  UINT64      *InterruptSspTable;\r
+\r
+  if ((PcdGet32 (PcdControlFlowEnforcementPropertyMask) != 0) && mCetSupported) {\r
+    SmmShadowStackSize = EFI_PAGES_TO_SIZE (EFI_SIZE_TO_PAGES (PcdGet32 (PcdCpuSmmShadowStackSize)));\r
+    if (FeaturePcdGet (PcdCpuSmmStackGuard)) {\r
+      SmmShadowStackSize += EFI_PAGES_TO_SIZE (2);\r
+    }\r
+    mCetPl0Ssp = (UINT32)((UINTN)ShadowStack + SmmShadowStackSize - sizeof(UINT64));\r
+    PatchInstructionX86 (mPatchCetPl0Ssp, mCetPl0Ssp, 4);\r
+    DEBUG ((DEBUG_INFO, "mCetPl0Ssp - 0x%x\n", mCetPl0Ssp));\r
+    DEBUG ((DEBUG_INFO, "ShadowStack - 0x%x\n", ShadowStack));\r
+    DEBUG ((DEBUG_INFO, "  SmmShadowStackSize - 0x%x\n", SmmShadowStackSize));\r
+\r
+    if (FeaturePcdGet (PcdCpuSmmStackGuard)) {\r
+      if (mSmmInterruptSspTables == 0) {\r
+        mSmmInterruptSspTables = (UINTN)AllocateZeroPool(sizeof(UINT64) * 8 * gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus);\r
+        ASSERT (mSmmInterruptSspTables != 0);\r
+        DEBUG ((DEBUG_INFO, "mSmmInterruptSspTables - 0x%x\n", mSmmInterruptSspTables));\r
+      }\r
+      mCetInterruptSsp = (UINT32)((UINTN)ShadowStack + EFI_PAGES_TO_SIZE(1) - sizeof(UINT64));\r
+      mCetInterruptSspTable = (UINT32)(UINTN)(mSmmInterruptSspTables + sizeof(UINT64) * 8 * CpuIndex);\r
+      InterruptSspTable = (UINT64 *)(UINTN)mCetInterruptSspTable;\r
+      InterruptSspTable[1] = mCetInterruptSsp;\r
+      PatchInstructionX86 (mPatchCetInterruptSsp, mCetInterruptSsp, 4);\r
+      PatchInstructionX86 (mPatchCetInterruptSspTable, mCetInterruptSspTable, 4);\r
+      DEBUG ((DEBUG_INFO, "mCetInterruptSsp - 0x%x\n", mCetInterruptSsp));\r
+      DEBUG ((DEBUG_INFO, "mCetInterruptSspTable - 0x%x\n", mCetInterruptSspTable));\r
+    }\r
+  }\r
+}\r
+\r