UefiCpuPkg/PiSmmCpuDxeSmm: remove DBs from SmmRelocationSemaphoreComplete32()

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / X64 / SmmInit.nasm

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm
index 1a0667bd97bae95836b7f53cce06b3c9b9d54389..0b0c3f28e53fa04c7733dee48ddd6704fdb10686 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm
@@ -25,13 +25,14 @@ extern ASM_PFX(mSmmRelocationOriginalAddress)
 global ASM_PFX(gPatchSmmCr3)\r
 global ASM_PFX(gPatchSmmCr4)\r
 global ASM_PFX(gPatchSmmCr0)\r
-global ASM_PFX(gSmmJmpAddr)\r
-global ASM_PFX(gSmmInitStack)\r
+global ASM_PFX(gPatchSmmInitStack)\r
 global ASM_PFX(gcSmiInitGdtr)\r
 global ASM_PFX(gcSmmInitSize)\r
 global ASM_PFX(gcSmmInitTemplate)\r
-global ASM_PFX(mRebasedFlagAddr32)\r
-global ASM_PFX(mSmmRelocationOriginalAddressPtr32)\r
+global ASM_PFX(gPatchRebasedFlagAddr32)\r
+global ASM_PFX(gPatchSmmRelocationOriginalAddressPtr32)\r
+\r
+%define LONG_MODE_CS 0x38\r
 \r
     DEFAULT REL\r
     SECTION .text\r
@@ -66,13 +67,13 @@ ASM_PFX(gPatchSmmCr4):
     mov     eax, strict dword 0         ; source operand will be patched\r
 ASM_PFX(gPatchSmmCr0):\r
     mov     cr0, eax                    ; enable protected mode & paging\r
-    DB      0x66, 0xea                   ; far jmp to long mode\r
-ASM_PFX(gSmmJmpAddr): DQ 0;@LongMode\r
+    jmp     LONG_MODE_CS : dword 0      ; offset will be patched to @LongMode\r
+@PatchLongModeOffset:\r
 \r
 BITS 64\r
 @LongMode:                              ; long-mode starts here\r
-    DB      0x48, 0xbc                   ; mov rsp, imm64\r
-ASM_PFX(gSmmInitStack): DQ 0\r
+    mov     rsp, strict qword 0         ; source operand will be patched\r
+ASM_PFX(gPatchSmmInitStack):\r
     and     sp, 0xfff0                  ; make sure RSP is 16-byte aligned\r
     ;\r
     ; Accoring to X64 calling convention, XMM0~5 are volatile, we need to save\r
@@ -124,25 +125,23 @@ ASM_PFX(SmmRelocationSemaphoreComplete):
 ;\r
 ; Semaphore code running in 32-bit mode\r
 ;\r
+BITS 32\r
 global ASM_PFX(SmmRelocationSemaphoreComplete32)\r
 ASM_PFX(SmmRelocationSemaphoreComplete32):\r
-    ;\r
-    ; mov byte ptr [], 1\r
-    ;\r
-    db      0xc6, 0x5\r
-ASM_PFX(mRebasedFlagAddr32): dd 0\r
-    db      1\r
-    ;\r
-    ; jmp dword ptr []\r
-    ;\r
-    db      0xff, 0x25\r
-ASM_PFX(mSmmRelocationOriginalAddressPtr32): dd 0\r
+    push    eax\r
+    mov     eax, strict dword 0                ; source operand will be patched\r
+ASM_PFX(gPatchRebasedFlagAddr32):\r
+    mov     byte [eax], 1\r
+    pop     eax\r
+    jmp     dword [dword 0]                    ; destination will be patched\r
+ASM_PFX(gPatchSmmRelocationOriginalAddressPtr32):\r
 \r
+BITS 64\r
 global ASM_PFX(PiSmmCpuSmmInitFixupAddress)\r
 ASM_PFX(PiSmmCpuSmmInitFixupAddress):\r
     lea    rax, [@LongMode]\r
-    lea    rcx, [ASM_PFX(gSmmJmpAddr)]\r
-    mov    qword [rcx], rax\r
+    lea    rcx, [@PatchLongModeOffset - 6]\r
+    mov    dword [rcx], eax\r
 \r
     lea    rax, [ASM_PFX(SmmStartup)]\r
     lea    rcx, [@L1]\r