UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmmCr0" with PatchInstructionX86()

[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / X64 / SmmInit.nasm

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm
index 971bd118132fc7c29ef8a83e46a84f825ef9a577..1a0667bd97bae95836b7f53cce06b3c9b9d54389 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmInit.nasm
@@ -24,7 +24,7 @@ extern ASM_PFX(mSmmRelocationOriginalAddress)
 \r
 global ASM_PFX(gPatchSmmCr3)\r
 global ASM_PFX(gPatchSmmCr4)\r
-global ASM_PFX(gSmmCr0)\r
+global ASM_PFX(gPatchSmmCr0)\r
 global ASM_PFX(gSmmJmpAddr)\r
 global ASM_PFX(gSmmInitStack)\r
 global ASM_PFX(gcSmiInitGdtr)\r
@@ -63,8 +63,8 @@ ASM_PFX(gPatchSmmCr4):
     or      ah, BIT3                    ; set NXE bit\r
 .1:\r
     wrmsr\r
-    DB      0x66, 0xb8                   ; mov eax, imm32\r
-ASM_PFX(gSmmCr0): DD 0\r
+    mov     eax, strict dword 0         ; source operand will be patched\r
+ASM_PFX(gPatchSmmCr0):\r
     mov     cr0, eax                    ; enable protected mode & paging\r
     DB      0x66, 0xea                   ; far jmp to long mode\r
 ASM_PFX(gSmmJmpAddr): DQ 0;@LongMode\r